12 Commits (master)

Author SHA1 Message Date
Sylvain Munaut 641ac1e3ef gateware: Switch to using Vex CPU
2 months ago
Sylvain Munaut 2188b231be gateware: Switch clk_sys to 12 MHz
2 months ago
Sylvain Munaut 119bc9fa1f gateware: Switch to using the _3 variant of system manager
2 months ago
Sylvain Munaut b5a4d41477 gateware/cores: Update submodules
2 months ago
Sylvain Munaut 4cba7c201b gateware/rtl: Fix sysmgr_3 reset generation
2 months ago
Sylvain Munaut c21605e845 gateware/rtl: Fix sysmgr_2 PLL output order and gating
2 months ago
Sylvain Munaut 453b3edb26 gateware: Remove debug clk_sys output
3 months ago
Sylvain Munaut 6a7ee1d17a gateware: Set explicit 100K pullup for pwr_usb_n/pwr_chg_n
3 months ago
Sylvain Munaut b2d95779c6 gateware/sysmgr: Make sure sys_start _always_ forces system clock ON
3 months ago
Sylvain Munaut 27f35141de gateware/firmware: Add better support for buttons
3 months ago
Sylvain Munaut cb8197a6c7 gateware: Add .gitignore
3 months ago
Sylvain Munaut c85dc29b06 gateware: Initial import of the FPGA gateware
3 months ago