It's a good ~ 3.5x faster than the PicoRV32 (in number of cycles),
which allows to shutdown the system clock more and reduce power
a bit as well.
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Without that the SPI_SR_RRDY bit isn't cleared for the next
transfer.
It uses to works simply because the PicoRV32 wasn't fast enough ...
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
This actually helps save a bit of power (at least for sysmgr_3) since
the "always-on" clk_base is slower.
The SoC needs more time to compute frames, but the same number of
cycles so that doesn't change the power on clk_sys itself really.
This will also be helpful for upcoming commits where we switch to
a Vex that has better IPC but doesn't easily meet 24 MHz constraint.
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Basically if VBUS is present, we enable USB and we don't go to
sleep to make sure we react in time.
Also add skeleton to read and handle button press events.
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Before it was only sensitive to rising edge. But for the "start" we
actually want to force it on if active to avoid race condition in the
software where:
- CPU clears the condition of the wakeup
- New wake up event happens right after it
- CPU asks for shutdown
- And then no rising edge happens because wakeup is already high
For shutdown it's good that it's rising edge dependent since the
OFF command signal _might_ stay high if the system clock shuts down
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
The press events are detected in the gateware and latched
and the firmware can just read them as "events". They also
trigger sys clock domain wake up if it was sleeping.
This is better since the 'sys' clock domain can be shutdown for
some non-negligible amount of time and it could lead to missed
presses or latency.
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Sylvain Munaut