Commit Graph

34 Commits (master)

Author SHA1 Message Date
Sylvain Munaut 641ac1e3ef gateware: Switch to using Vex CPU
It's a good ~ 3.5x faster than the PicoRV32 (in number of cycles),
which allows to shutdown the system clock more and reduce power
a bit as well.

Signed-off-by: Sylvain Munaut <>
2023-03-23 11:18:14 +01:00
Sylvain Munaut 5a98883e03 firmware/main: Fix SPI Xfer and always read the byte from HW
Without that the SPI_SR_RRDY bit isn't cleared for the next

It uses to works simply because the PicoRV32 wasn't fast enough ...

Signed-off-by: Sylvain Munaut <>
2023-03-23 07:38:52 +01:00
Sylvain Munaut 2188b231be gateware: Switch clk_sys to 12 MHz
This actually helps save a bit of power (at least for sysmgr_3) since
the "always-on" clk_base is slower.

The SoC needs more time to compute frames, but the same number of
cycles so that doesn't change the power on clk_sys itself really.

This will also be helpful for upcoming commits where we switch to
a Vex that has better IPC but doesn't easily meet 24 MHz constraint.

Signed-off-by: Sylvain Munaut <>
2023-03-22 21:54:35 +01:00
Sylvain Munaut 119bc9fa1f gateware: Switch to using the _3 variant of system manager
This alone seems to reduce by ~30% the power usage of the SoC
(when USB is off).

Signed-off-by: Sylvain Munaut <>
2023-03-22 21:49:57 +01:00
Sylvain Munaut b5a4d41477 gateware/cores: Update submodules
Signed-off-by: Sylvain Munaut <>
2023-03-21 16:27:11 +01:00
Sylvain Munaut 4cba7c201b gateware/rtl: Fix sysmgr_3 reset generation
Seems that having the reset not being 1 directly causes some
issue somewhere so fix it.

Signed-off-by: Sylvain Munaut <>
2023-03-21 16:22:17 +01:00
Sylvain Munaut c21605e845 gateware/rtl: Fix sysmgr_2 PLL output order and gating
For some reasons the ports were not in order and also the gating
was applied to the wrong port.

Signed-off-by: Sylvain Munaut <>
2023-03-21 13:04:20 +01:00
Sylvain Munaut 4eb2ed52d2 firmware/main: For candle mode, make max brightness random
This makes it look a bit smoother and also reduces the average
current, saving a bit of power.

Signed-off-by: Sylvain Munaut <>
2023-03-20 15:26:13 +01:00
Sylvain Munaut 2277549293 firmware/main: For breathe mode, allow earlier OverBright re-use
Signed-off-by: Sylvain Munaut <>
2023-03-20 15:20:07 +01:00
Sylvain Munaut 69d8da7f2a firmware/main: Add the new animation led code
Signed-off-by: Sylvain Munaut <>
2023-03-19 19:47:39 +01:00
Sylvain Munaut 4da1f456ad firmware/main: Use "lightness" terminology
Signed-off-by: Sylvain Munaut <>
2023-03-19 19:41:05 +01:00
Sylvain Munaut a14030f4a4 firmware/main: Cleanup pass on the led control code
Signed-off-by: Sylvain Munaut <>
2023-03-16 20:22:46 +01:00
Sylvain Munaut 84470dd095 firmware/main: Rework main loop skeleton
Basically if VBUS is present, we enable USB and we don't go to
sleep to make sure we react in time.

Also add skeleton to read and handle button press events.

Signed-off-by: Sylvain Munaut <>
2023-03-16 10:07:57 +01:00
Sylvain Munaut ebc8a810c7 firmware: Move rand16() to utils.{c,h}
Signed-off-by: Sylvain Munaut <>
2023-03-16 09:59:06 +01:00
Sylvain Munaut 453b3edb26 gateware: Remove debug clk_sys output
Save all the power !

Signed-off-by: Sylvain Munaut <>
2023-03-16 09:59:06 +01:00
Sylvain Munaut 6a7ee1d17a gateware: Set explicit 100K pullup for pwr_usb_n/pwr_chg_n
We want them weak in case any of this can leak back in the 5V

Signed-off-by: Sylvain Munaut <>
2023-03-16 09:59:06 +01:00
Sylvain Munaut b2d95779c6 gateware/sysmgr: Make sure sys_start _always_ forces system clock ON
Before it was only sensitive to rising edge. But for the "start" we
actually want to force it on if active to avoid race condition in the
software where:

- CPU clears the condition of the wakeup
- New wake up event happens right after it
- CPU asks for shutdown
- And then no rising edge happens because wakeup is already high

For shutdown it's good that it's rising edge dependent since the
OFF command signal _might_ stay high if the system clock shuts down

Signed-off-by: Sylvain Munaut <>
2023-03-16 09:59:06 +01:00
Sylvain Munaut 27f35141de gateware/firmware: Add better support for buttons
The press events are detected in the gateware and latched
and the firmware can just read them as "events". They also
trigger sys clock domain wake up if it was sleeping.

This is better since the 'sys' clock domain can be shutdown for
some non-negligible amount of time and it could lead to missed
presses or latency.

Signed-off-by: Sylvain Munaut <>
2023-03-16 09:59:06 +01:00
Sylvain Munaut 0aa54bc297 hardware/xs-ctrl: Add issues/reworks for VBUS detect
Signed-off-by: Sylvain Munaut <>
2023-03-14 09:06:10 +01:00
Sylvain Munaut cb8197a6c7 gateware: Add .gitignore
Signed-off-by: Sylvain Munaut <>
2023-03-12 11:07:38 +01:00
Sylvain Munaut acaef093d4 firmware: Add .gitignore
Signed-off-by: Sylvain Munaut <>
2023-03-12 11:07:12 +01:00
Sylvain Munaut bbd3486f8c firmware: Import the main firmware
This is the state that was used for the battery testing, so
import as-is to keep a record of changes.

Signed-off-by: Sylvain Munaut <>
2023-03-12 11:05:07 +01:00
Sylvain Munaut c2260dc7dd Adjust readme to reflect the main firmware begin gpl/lgpl
Signed-off-by: Sylvain Munaut <>
2023-03-12 11:04:02 +01:00
Sylvain Munaut f4ee67209b firmware: Import of the boot code
This is what gets embedded in the bitstream and loads the
main software from flash.

Signed-off-by: Sylvain Munaut <>
2023-03-11 23:54:51 +01:00
Sylvain Munaut c85dc29b06 gateware: Initial import of the FPGA gateware
Signed-off-by: Sylvain Munaut <>
2023-03-11 23:54:12 +01:00
Sylvain Munaut bf1310fd5d hardware: Import .gitignore
Signed-off-by: Sylvain Munaut <>
2023-03-11 22:20:12 +01:00
Sylvain Munaut 1a7fa993d4 hardware: Import the front face PCB with leds
Signed-off-by: Sylvain Munaut <>
2023-03-11 22:19:34 +01:00
Sylvain Munaut b6ad4588cb hardware: Import the flat flex breakout board
Signed-off-by: Sylvain Munaut <>
2023-03-11 20:11:47 +01:00
Sylvain Munaut ff92be1507 hardware: Import the controller board
Signed-off-by: Sylvain Munaut <>
2023-03-11 20:00:21 +01:00
Sylvain Munaut c456d03730 drawings: Import concept / face drawings and ref material
Signed-off-by: Sylvain Munaut <>
2023-03-10 20:26:59 +01:00
Sylvain Munaut daa5661d4b doc: Import LED data
Signed-off-by: Sylvain Munaut <>
2023-03-10 20:25:31 +01:00
Sylvain Munaut d4fc1e9990 doc: Import datasheets
Signed-off-by: Sylvain Munaut <>
2023-03-10 20:24:56 +01:00
Sylvain Munaut 29f4d30eaa doc: Import licenses full text
Signed-off-by: Sylvain Munaut <>
2023-03-10 20:24:42 +01:00
Sylvain Munaut 89b7efe7e6 Initial commit
Signed-off-by: Sylvain Munaut <>
2023-03-10 20:24:21 +01:00