Commit Graph

285 Commits

Author SHA1 Message Date
Harald Welte 1b9a5b8125 Add various SIM card related debug command
this allows commands like
 sim-status 0		# read the status
 sim-voltage 0 5	# set voltage to 5V
 sim-clkdiv 0 2		# set clock-divider to 2 (10 MHz)
 sim-reset 0 0		# disable reset
 sim-power 0 1		# enable power

Change-Id: Id6131be60d37cba769c79952fa44f3ec6c976a38
2019-02-27 13:44:28 +00:00
Harald Welte ff9f4ceca9 Add mnimalistic command line interface "command.c"
This is a very simplistic command line interface parser which
various parts of the code can use to register textual commands
on the debug UART.

Change-Id: I2d289228fb97ecde5602e9756f3d7c51fa65a3b7
2019-02-27 13:42:27 +00:00
Kevin Redon 3c045b29ce minor: rename MUX_SSTAT to MUX_STAT
Change-Id: I5eee17de31fdce92346641772fc0c63d4c37507a
2019-02-27 13:22:33 +00:00
Harald Welte 361ed2072b Switch SERCOM7 (Debug UART) to sync mode + add STDIO
this will allow us to do printf()

Change-Id: Ibf4ba961d4bbf8d787558f38f3d557422587aad3
2019-02-27 13:17:17 +00:00
Kevin Redon d0903f7e51 fix ASFv4 USB stack
this ASFv4 USB library change fixes USB transfer.
two transfer-size issues existed:
- on multi-packet transfer if the last packet was less than the
USB transfer packet size, the packet would be received but not
acknowledged
- during normal transfer the packet size of a previous packet set
the size of the current packet, ignoring the actual transfer size

Change-Id: I4209072ee808f0e246bcd5e86917dcf1d213c26b
2019-02-26 23:06:42 +00:00
Harald Welte 93f628a4c3 PA11: Increase drive strength to 8mA
It has been observed that the 20 MHz clock signal doesn't even remotely
resemble a square shape unless DRVSTR=1 is set using this patch.

Change-Id: I1366e13442eda829756aa4121be81eb15135c73e
2019-02-24 23:05:15 +01:00
Harald Welte f53f226765 Enable cache via CMCC for higher performance
Change-Id: I7a243a8d964fea3d3decc6c73c16e07036e4ee93
2019-02-24 23:05:15 +01:00
Harald Welte 092494ef77 Update from AtmelStart: Define all used GPIO pins
Change-Id: I2cb67fd01f6e8602af16bbdb4960427586cdd9a4
2019-02-24 23:05:15 +01:00
Harald Welte 863ea296d9 update from Atmel Start (just loading + re-exporting the project)
Change-Id: I59b2442a95871b8052bfdfdac6d77a7207d8b70a
2019-02-24 23:05:15 +01:00
Harald Welte c3f170d214 Support for sysmoOCTSIM NCN8025/SX1503 control
This adds an I2C bit-banging layer, defines the four busses on the
sysmoOCTSIM and adds some high-level functions to control the NCN8025
for each SIM slot.

Change-Id: Ic5287cf80d2be2070c504e9d40f7c6fc0d37d8b9
2019-02-24 23:05:15 +01:00
Kevin Redon 9c85463b1a add README file
Change-Id: I9286493e4e2d20f00a33e7b565adde10198f179a
2019-02-07 16:50:47 +01:00
Kevin Redon e4c9a177de add GPLv2 license
Change-Id: I761b3af3db43aa0da679c2f83aa89c92a7aae668
2019-02-07 16:23:30 +01:00
Kevin Redon eff5cb52c5 relocate application to after the DFU bootloader
without this relocation the DFU bootloader can jump to the
application but following executed code would not be the one from
the application.

Change-Id: Ieeefcf80918fd10e48debab6ff08505f6588811c
2019-02-07 15:56:05 +01:00
Kevin Redon d7dfb6e38b add debug welcome message output
Change-Id: I8dde644caa56152b17da674e187006726991ff9c
2019-02-07 15:56:05 +01:00
Kevin Redon 1f8ecefe65 add ISO7816 peripherals
configure SERCOM 0 to 6 peripherals to communicate using the
ISO7816 T=0 protocol.
SERCOM7 should be for the 8th SIM card, but for now it is used as
UART debug output.
Auto-detection between SERCOM for the 8th SIM and debug UART will
be done later.

Change-Id: I3f1411ec5bc2ed7dfa714550d041f52be665132a
2019-02-07 15:56:05 +01:00
Kevin Redon 6a8295cfa9 name pin according to schematic
Change-Id: I94a7f2216c288150b044a6190804f9b7247eb10c
2019-02-07 15:56:05 +01:00
Kevin Redon d4ed1ec9ff add 20 MHz clock output
use GCLK5 to output 20 MHz clock on PA11/GCLK_IO[5] for SIM cards
clock.
this can be further divided by the NCN8025 before reaching the SIM.

Change-Id: I2c0d6a31ec63a87e04ef4e3afbedce3a221324cc
2019-02-07 15:56:05 +01:00
Kevin Redon 4e39b0194f switch from dev board to prototype
the SAM E54 Xplained Pro development board uses a SAM E54P20N
micro-controller.
the sysmocom sysmoOCTSIM prototype uses a SAM E54N19A
micro-controller.
the system LED and UART debug GPIO are different, else the code
is the same.
the Atmel START definitions have been updated accordingly.

Change-Id: Ifd15f6759c51b42a8d11b09f9f495d7e7a5b6afc
2019-02-07 15:56:05 +01:00
Kevin Redon 8e5380068c echo back UART input
let main run the main loop instead of the CDC ACM example.
also rename the CDC ACM example functions.

Change-Id: I44b15079672b4058de1fa08365541317d54958dc
2019-02-07 15:56:05 +01:00
Kevin Redon 293c841773 fix DPLL input clock division
Change-Id: I3df1356d36b54d0cc34fd827265b1e4b9d55509f
2019-02-07 15:56:05 +01:00
Kevin Redon 78d2f44754 blink LED on UART activity
Change-Id: Ib230be6003f28931ab4c60228796ec0af6c783d9
2019-02-07 15:56:05 +01:00
Kevin Redon 5908a5ccc6 add system LED definition
Change-Id: I97dc71ac00b64fdd05e0ff4c7e16e1b68b57b695
2019-02-07 15:56:05 +01:00
Kevin Redon ccbed0b1df add SERCOM HAL Async library
Change-Id: I530a5bc5ee7e89149eb251bda0adf7963733d2ee
2019-02-07 15:56:05 +01:00
Kevin Redon e676557550 rename application to main
also remove unused armcc.
only the GCC cross-compiler is used.
the ARMCC Makefile would not be maintained.

Change-Id: Ib6ec525885943afba9b24df88a5bee8009df95b5
2019-02-07 15:56:05 +01:00
Kevin Redon 4cd3f7d163 add SERCOM peripheral for UART debug
currently only the SERCOM peripheral driver is added an configured,
but it is not being used.
UART debug will be done through the EDBG COM port, on PB24/PB25 of
SAM E54 Xplained Pro board

Change-Id: Id7af37ce1dd2d0a356e019c96bf6438ce459411b
2019-02-07 15:56:05 +01:00
Kevin Redon 4cb8e325c8 use XOSC1 directly for DPLL1
DPLL1 can take directly XOSC1 as input and divide it to 2 MHz.
thus the intermediate GCLK11 is not needed.
we now also completely de-configure GCLK11
this configuration is not supported by Atmel START since it does
not know about the division and thinks the input frequency
exceeds the maximum
GCLK2 is also disabled for now because it is not used

Change-Id: Icee7f5a13019c47cebc23376cabb18cb31178ece
2019-02-07 15:56:05 +01:00
Kevin Redon 20abc4f441 set DPLL1 to 100 MHz
use GCLK11 to bring external crystal oscillator XOSC1 from 12 MHz
to 2MHz
use DPLL1 to multiply 2 MHz to 100 MHz.
the division is first needed because the DPLL0 maximum input
frequency is 3.2 MHz
100 MHz is the maximum input frequency for the SERCOM peripherals

Change-Id: I0482c39cc0db999904c585d21738dbce57ca3b55
2019-02-07 15:56:04 +01:00
Kevin Redon 6b9363ca8e remove usage of GCLK11
DPLL0 can take directly XOSC1 as input and divide it to 2 MHz.
thus the intermediate GCLK11 is not needed.
this configuration is not supported by Atmel START since it does
not know about the division and thinks the input frequency
exceeds the maximum

Change-Id: I121ad850cf118b641fe522b513ffd7e00b30b710
2019-02-07 15:56:04 +01:00
Kevin Redon 4a2d8f4773 switch CPU clock to 120 MHz
use GCLK11 to bring external crystal oscillator XOSC1 from 12 MHz
to 2MHz
use DPLL0 to multiply 2 MHz to 120 MHz.
the division is first needed because the DPLL0 maximum input
frequency is 3.2 MHz

Change-Id: I642e724ec56a376addf21cc58ecd2ef1b40bd116
2019-02-07 15:56:04 +01:00
Kevin Redon 87af489c19 use external 32.768 kHz oscillator for RTC
Change-Id: Ic4630abececdb631e8cc15baab7137fc15e2a66a
2019-02-07 15:56:04 +01:00
Kevin Redon 9d45dfbfa7 ignore output files
Change-Id: I425129f10aa2ff879fde96bfafbcb7c4b4119959
2019-02-07 15:56:04 +01:00
Kevin Redon 3bc177537c change USB description to sysmoOCTSIM
Change-Id: I1f9819df5b4737a9a6dfa69c918d05c60ec5f86a
2019-02-07 15:56:04 +01:00
Kevin Redon 9b970d67b4 rename project to sysmoOCTSIM
Change-Id: I1ff2ac6e2ae1b1b4765f2ca27c5b3fa6e93baa95
2019-02-07 15:56:04 +01:00
Kevin Redon 69b92d91f7 start with USB CDC echo example
this is the Atmel START USB CDC Echo example project for the
SAM E54 Xplained Pro board using an Atmel ATSAME54P20A
microcontroller.
Atmel START information:
- Version: 1.4.1810 (Dec 18, 2018, 5:52 AM GMT+1)
- Server: 1.4.93
- Content version: 1.0.1340

This will serve as basis for the sysmoOCTSIM project

A jenkins contrib script has also been added to the
osmo-ccid-firmware project to build the sysmoOCTSIM firmware

Change-Id: I356de75e7b730d63fb819248e71d36f785932199
2019-02-07 15:54:56 +01:00
Harald Welte 63653741d3 initial commit related to CCID device/firmware implementation
The CCID core here shall be rather generic, and combined with the
hardware specific bits for (initially) the sysmoOCTSIM target.

Change-Id: I2789f7fcdb1b24c6ef47c7f37f4889f90acfd698
2019-01-03 16:55:51 +01:00