Commit Graph

285 Commits

Author SHA1 Message Date
Harald Welte a7da504e49 ccid: connect f_fs/aio code INT EP handling with CCID core
Change-Id: I91945574f10ce40628964bcd690dda932da7f911
2019-05-16 11:32:28 +02:00
Harald Welte 63976d4f4e ccid: Fix AIO handling of IN and IRQ endpoint
Even though functionfs forces us to use Linux AIO, we actually don't
want to submit multiple concurrent pendign writes, but we simply want
to emulate the poll/select interface.  So we must introduce a write
(message) queue for the IN and IRQ endpoint, and we must always only
pull one message off the queue, submit the iocb.  On completion, we
dequeue the next message, and so on.

Change-Id: I8f7026f13cf542185cfec4d4780c64965d1706e2
2019-05-16 11:32:28 +02:00
Harald Welte e73a1df340 ccid: Integrate libosmocore logging
Change-Id: I3436827f658653273af21f1deaf030c2a389f91a
2019-05-15 22:45:11 +02:00
Harald Welte e6b963cd33 ccid: Add README and kernel patch related to CCID on functionfs
Change-Id: Ib7315dadd63d14933e9728c0884297b440f6530c
2019-05-15 22:04:26 +02:00
Harald Welte bcbc1978e1 ccid_main_functionfs: Fix full chain of IN/OUT EP
which is already sufficient to make pcsc_scan happy and list all
eight cards/slots like

Reader 1: sysmoOCTSIM Test Reader [Osmocom CCID Interface] (2342) 01 00
  Event number: 0
  Card state: Card removed,

Change-Id: I37bd952ef0add662d565150f70e83d85ffd0c254
2019-05-15 22:03:55 +02:00
Harald Welte 0bc79a24f8 ccid: rename ccid_descriptors.c to ccid_main_functionfs
... which resembles its actual purpose much better

Change-Id: I02d21a9594db8e87714b6ce0d106ed3ef5297548
2019-05-15 19:55:50 +02:00
Harald Welte d5d555c3e2 ccid: tie ccid_device implementation into ccid_descriptors.c
Change-Id: Iaf40e8e455f79f7db71de767c442ba9e98961e0f
2019-05-15 19:55:50 +02:00
Harald Welte 8d186adddf Add ccid_device.h file for ccid_device.c
Change-Id: I1b171ede38deebfa525a0ee10865da2dc5ec7e4e
2019-05-15 19:55:50 +02:00
Harald Welte 8579ce51d2 ccid: Implement encode/decode of ProtocolParameters
Change-Id: Id6c436916a54b98a11809a58e9154e3e9b627885
2019-05-15 19:55:50 +02:00
Harald Welte a41252178d ccid: Build with -Wall
Change-Id: I50cf270aefa4c9fd0d7ab27a9a6e4716a2e95416
2019-05-15 19:55:50 +02:00
Harald Welte 8772f58e96 ccid_device: Return errors in case of invalid slot numbers
Change-Id: I4928425cc114c7af0068b13280fe89f428f44aab
2019-05-15 19:55:49 +02:00
Harald Welte 92e7c0bc91 ccid_device: Make it compile
Change-Id: I0350fec36eeef69eeccb873f547c9df8b364ae12
2019-05-15 19:55:49 +02:00
Harald Welte 575531b5f5 ccid_proto: Fix ccid_rdr_to_pc_{data_rate_and_clock,escape}
Both use 'struct ccid_header_in', not 'struct ccid_header'.

Change-Id: I0e370da11a0c95d0ea4a517aa6060f16e21adef0
2019-05-15 19:55:49 +02:00
Harald Welte 4f25df6c8a CICD: Add ccid_proto.c with value_string of important enumerations
Change-Id: Idc6b3d2f0a22db3a57f0c05d96c776e92b718b07
2019-05-15 19:55:49 +02:00
Harald Welte eb93f63833 ccid_proto.h: Add enum ccid_class_spec_req
This list the three class specific control requests specified in
the CCID spec.

Change-Id: I361f1674355384a97e51374f50f4346313191a7d
2019-05-11 20:22:24 +02:00
Harald Welte 8049d66993 some basic talloc related vty commands
Change-Id: Id7c99e0c1d6b7421667425d38b512ad959142132
2019-05-11 20:22:23 +02:00
Harald Welte 189f43d109 talloc: \n -> \r\n for serial output
Change-Id: Ieeb6a93c2dc9578220c73771136e2df7476f5e45
2019-05-11 20:21:41 +02:00
Harald Welte 5df0be6727 Import libtalloc-2.1.14 into the tree
talloc is a hirearchical memory allocator which Osmocom uses a lot
for its userspace programs on Linux.  Experiments show that it's
actually very much possible to use it inside of microcontroller firmware
projects, particularly the small subset which we generally use.

Change-Id: Ibd31b40d5b75b3fc1783a6b02b0e97da430e0f60
2019-05-11 20:21:41 +02:00
Kevin Redon 36efc6db6e finish implementing sim-iccid
Change-Id: I71b5832703a60c0c967fa2c6bc0eec56883962c5
2019-05-09 18:03:20 +02:00
Kevin Redon 5188e9f662 add function to transfer TPDU
this function takes care of reading and writing the complete TPDU
to the card.

note: the sim-iccid command uses this function, but still only to
select MF.

Change-Id: I50c90f3697580a4c93220a3e09cc33ec85889814
2019-05-09 17:35:39 +02:00
Kevin Redon 096c505ce4 add debug command to communicate with card
currently the sim-iccid command only selects MF.
this is a proof of concept for card communication.
the transmission/reception must be generalized to avoid copying
the code multiple times.

IMPORTANT: the sim-iccid commands only works after the sim-atr
command, which sets up the cards correctly

Change-Id: Icbcde783143694afce23af6e3f26bcd7a9a13b85
2019-05-09 16:12:32 +02:00
Kevin Redon 0f050721c8 add slot_set_isorate to the baud rate using ISO 7816 values
Change-Id: I604f72bb28944962aee055e6d88a435827f79bec
2019-05-09 15:46:38 +02:00
Kevin Redon 632502db10 add ISO 7816-3 definitions and utilities
Change-Id: Ice4eba380126ff92089b71d0ea328b0110f7ffec
2019-05-09 15:46:38 +02:00
Kevin Redon 072951be8f add function to set baudrate
it will set the GCLK as SERCOM core clock with the lowest baud
rate error and set the closest baud rate in the SERCOM peripheral.

Change-Id: I01db273f4c8170a4942049653c575010b93296ce
2019-05-09 15:46:38 +02:00
Kevin Redon 5e7cfaed36 configure GCLK for ISO baud rates
the SERCOMM clock triplet 0.5 MHz (100 MHz / 200),
7.0588 MHz (120 MHz / 17), and 50 MHz (100 MHz / 2) allows to
generate all possible ISO 7816 baud rates (from
F = 2048 / D = 1 @ f = 2.5 MHz -> 1220 bps to
F = 372 / D = 64 @ f = 20 MHz -> 3.4 Mbps) with a maximum baud
rate error of 2.57 %, for available SIM clocks 2.5, 5, 10, 20 MHz.
2.57% means a bit more than quarter a bit might be wrong after the
11 bits ISO transmission (still less than half a bit).
This triplet is one of the optimum when 3 clocks are used.
An additional clock would be required for higher accuracy.

The 50 MHz clock is re-used from the RMII clock output.

Change-Id: I2c69848582e49031fa6453f535a2bf1408f8e22e
2019-05-09 15:46:38 +02:00
Kevin Redon f53d366c1d output 50 MHz for RMII
in hardware revision 2 the Ethernet PHY RMII_CLOCK input clock is
connected to the MCU pin PA10.
GCLK4 of the MCU now outputs the required 50 MHz clock on this pin.
the same clock is re-used for UART debug to generate the 921600
bps baud rate.

Change-Id: Id3a3dee15c3986536b0623d0f39ca62e94acd1fd
2019-05-09 15:46:38 +02:00
Kevin Redon 0c3533fc09 UART_debug now uses the async library with tx ring
Change-Id: I4cf689a8d3dc292201f1e2ce6c013aa1686ad6bc
2019-05-09 15:46:38 +02:00
Kevin Redon de9fb2ec6d add async library with ring on TX
the standard async library expected the caller to wait until the
transmission was complete (by counting using the transmit callback
or checking using usart_async_get_status) before freeing/reusing
the memory holding the data to be transmitted.
this is not practical when using stdio on top of the peripheral
since printf returns directly and reuses the memory.
the new USART async library has a ring buffer for the data to be
transmitted (similar to the data being received).

WARNING: write is blocking when the TX buffer is full.
this prevents loosing data.

Change-Id: Iafd5295b90ef9f428f640314c24f6c31ee82c9d6
2019-05-09 15:46:36 +02:00
Kevin Redon ba3a2fa250 switch UART_debug to ASYNC
using the synchronous HAL library causes RX overflow after 5 bytes
on bulk incoming data (e.g. pasted).
this mainly due to printing synchronously the character, but to
further prevent congestion we switch to asynchronous (e.g.
interrupt driven) communication.

The RX part works great now (no overflow), but the TX part is
malfunctioning because the HAL Async library does not buffer the
data to be transmitted and expects it to be in memory until
the transmission is complete (which printf does not do).

This change will not be reflected in Atmel START since it does not
allow to set the underlying STDIO redirect peripheral to async.

Change-Id: If18883e96f336aa9f6b11607859260da5e1503c7
2019-04-18 17:27:20 +02:00
Harald Welte 077258163f sim-atr: Print slot number when printing ATR
Change-Id: Iafb957f551de1239f63360854fabeecfeb62b530
2019-04-17 17:33:17 +02:00
Harald Welte dcf5783424 sim-atr command: enable the LED when the command is active.
Change-Id: I50c125d46233e86003cc14ec9b5bac47127e8776
2019-04-17 17:33:17 +02:00
Kevin Redon 70b867a64a remove SWO pin initialisation
using the SWO signal on TX has the advantage of being able to
have printf debug while still using SERCOM7 in ISO7816 mode for
the SIM card, but it has two drawbacks:
- SWO outputs data only if a debug session is ongoing (e.g. a SWD
debugger is connected). this saves output processing when no SWD
is connected, but it is not possible to force output without
having an SWD debugger connect (confirmed by Microchip help),
which is not convenient for simple UART debugging.
- no input is possible (SWO can only output).

Thus instead we will still use SERCOM7 for UART debug, allowing
commands to be input.
SERCOM7 should only be used for UART debug when no card in present
in SIM7.
This check in not yet implemented.

Change-Id: I199d6e356129526e65d5d1075a264eb35904d099
2019-04-17 12:06:11 +02:00
Kevin Redon a562a1437f update ASFv4 library to 1.0.1465
Change-Id: I828e87c7ededbb50a999d672cf0b738eef9a093a
2019-04-17 12:06:11 +02:00
Kevin Redon 0bc0d74e88 update CMSIS to 5.1.2
this changes comes from Atmel START

Change-Id: Ib9b00107836c1604c7169d69ba607fead8c55355
2019-04-17 12:06:11 +02:00
Kevin Redon 18c2dbbb15 minor: update atmel start project configuration
Change-Id: I8e719f1687befb9a3657a2e582165dec3cd00094
2019-04-17 12:06:11 +02:00
Harald Welte 34fabacbf6 command.c: don't print "unknown command" for empty commands
Change-Id: If8512a705e464a9cae949e6278a8d69eb7833737
2019-04-17 12:06:00 +02:00
Kevin Redon c89bb8cd79 add sim-atr command
the sim-atr command resets the card and read the resulting
answer to reset.

Change-Id: I30b284cab60a50d4cd3080f46f4d332193bbf1ee
2019-04-17 12:06:00 +02:00
Kevin Redon 37e5fa913b change SERCOM clock to 3.3 MHz
we use the SERCOM peripheral for USART (in 7816 mode SIM card
communication) in synchronous mode (TX and RX clock are the same).
in this mode only the 8 least significant bits of the BAUD register
are used (see TRM 33.6.2.3 Clock Generation – Baud-Rate Generator).
When the SERCOM is clocked at 100 MHz the minimum resulting baud
rate would be 100E6 / (2 * 255 + 1) = 195694 bps.
clocking SERCOM at 3.33 MHz also to have a baud rate of 6720 bps
(~ 3.33E6 / (2 * 247 + 1)), used after reset to read the ATR.

Change-Id: Id60322e092a6652a89821fc737d5336d79a1420c
2019-04-17 11:52:00 +02:00
Kevin Redon ee4912966b change ISO baud rate default to 6720 bps
the ISO7816 I/O baud rate is f / (Fd / Dd), with Fd 372, Dd = 1.
f_max is 4 MHz, but we will use the minimum 20 / 8 = 2.5 MHz,
thus the baud rate after reset will be 6720 bps.

Change-Id: I9165575404f070c7429daaa3593838d08a5c5e10
2019-04-17 11:52:00 +02:00
Kevin Redon 4be5276743 minor: improve documentation
Change-Id: I250209d45a57c5ad7d1265a68aa71fc31ec06f69
2019-04-17 11:52:00 +02:00
Kevin Redon 0c7ea79dcf remove example code
as the code will use alternative libraries, the examples will not
be able to compile anymore.
plus they are not required for the firmware and the example code
can be downloaded from Atmel start.

Change-Id: If53df47089de9eb8498734c19d6a0420c1e79031
2019-04-17 11:06:20 +02:00
Harald Welte 61dad9145f jenkins.sh: use PARALLEL_MAKE to accelerate build speed
Change-Id: Idb75e028d52803e3f8685d42c584f8f96613ec3c
2019-04-17 08:58:51 +00:00
Kevin Redon c94e0fc0e6 add ASFv4 M2M (memory-to-memory DMA) middleware
This is form Atmel Start and provides functionality for hardware-based
DMA copies from memory to memory.

Change-Id: Ib07755b2c5974af70817f5460fb0f358c631452a
2019-04-17 10:25:09 +02:00
Kevin Redon 6ddca8b488 minor: remove unnecessary hello world command
Change-Id: I414b2ddd0bacff692316fe212b9d3b506100a7ba
2019-04-17 10:24:03 +02:00
Kevin Redon b40c3ee903 minor: fix typo
Change-Id: I57c743250af19713e7438606bc1c737cfe0c383c
2019-04-17 10:24:03 +02:00
Harald Welte 67b2abacd2 manual_test.c: New manual board testing mode
Change-Id: I8fc94fa08521224eff79d0aa9d7b42ceeaa760c9
2019-04-16 21:13:48 +02:00
Harald Welte 1762506a1f ncn8025: Invert the software logic of RSTIN
In hardware, the Card RST pin is low-active.  There's a level
translator in the NCN8025, but there's no logic inversion, so RSTIN
is also low-active.  In software, we have the policy of all signals
being "true-active", i.e. true represents the active state, and false
the inactive state.

Hence, we must invert the logic of how we handle rstin.

Change-Id: Ia45246b7517b2e6ecb01d22b3af52aee7a51de64
2019-04-16 21:11:40 +02:00
Harald Welte e7aa534355 command.c: Print prompt when starting up
Change-Id: I18e4351609ab10c06a2fa197cb9f7a66269799a0
2019-04-16 21:11:40 +02:00
Harald Welte 255da5ed24 main.c: Call ncn8025_init also for SIM7
The ncn8025 has no impact on the UART, so no matter if we use
SERCOM7 as debug uart or as SIM UART, we can always initialize
the NCN8025 and thereby allow control of (e.g.) the LED.

Change-Id: I70ae1e050d5540627bc77626dbf1b6040e95dae4
2019-04-16 18:20:53 +02:00
Harald Welte 5af7c8c36b ncn8025: Add support for reading SIMx_INT status
Change-Id: Iab9edc1214bb22ee304daa834fd9e2376d42c97c
2019-02-27 13:46:46 +00:00