update from Atmel Start (just loading + re-exporting the project)
Change-Id: I59b2442a95871b8052bfdfdac6d77a7207d8b70a
This commit is contained in:
parent
c3f170d214
commit
863ea296d9
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@ -67,11 +67,6 @@
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_sleep.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_spi.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_spi_async.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_spi_m_async.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_spi_m_dma.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_spi_m_sync.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_spi_s_async.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_spi_s_sync.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_spi_sync.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_usart.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_usb.h"/>
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@ -169,6 +164,11 @@
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hal_usart_async.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_missing_features.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_reset.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_spi_m_async.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_spi_m_dma.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_spi_m_sync.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_spi_s_async.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_spi_s_sync.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_usart_async.h"/>
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<file category="header" condition="ARMCC, GCC, IAR" name="hal/include/hpl_usart_sync.h"/>
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<file category="source" condition="ARMCC, GCC, IAR" name="hal/src/hal_usart_async.c"/>
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@ -2,12 +2,12 @@ format_version: '2'
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name: sysmoOCTSIM
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versions:
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api: '1.0'
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backend: 1.4.93
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commit: 9c29f8365cf76e9937d19b1e765a83bc7a80e4e9
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content: 1.0.1340
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backend: 1.5.122
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commit: 820baecf7dd115d94b0d42ee3b0b9d6ba2da7113
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content: 1.0.1405
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content_pack_name: acme-packs-all
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format: '2'
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frontend: 1.4.1810
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frontend: 1.5.1826
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board:
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identifier: CustomBoard
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device: SAME54N19A-AF
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@ -773,6 +773,8 @@ drivers:
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nodes:
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- name: CPU
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input: CPU
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external: false
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external_frequency: 0
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configuration: {}
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OSC32KCTRL:
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user_label: OSC32KCTRL
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@ -981,8 +983,12 @@ drivers:
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nodes:
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- name: Core
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input: Generic clock generator 2
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external: false
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external_frequency: 0
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- name: Slow
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input: Generic clock generator 3
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external: false
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external_frequency: 0
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configuration:
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core_gclk_selection: Generic clock generator 2
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slow_gclk_selection: Generic clock generator 3
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@ -1024,8 +1030,12 @@ drivers:
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nodes:
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- name: Core
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input: Generic clock generator 2
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external: false
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external_frequency: 0
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- name: Slow
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input: Generic clock generator 3
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external: false
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external_frequency: 0
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configuration:
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core_gclk_selection: Generic clock generator 2
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slow_gclk_selection: Generic clock generator 3
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@ -1067,8 +1077,12 @@ drivers:
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nodes:
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- name: Core
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input: Generic clock generator 2
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external: false
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external_frequency: 0
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- name: Slow
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input: Generic clock generator 3
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external: false
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external_frequency: 0
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configuration:
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core_gclk_selection: Generic clock generator 2
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slow_gclk_selection: Generic clock generator 3
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@ -1110,8 +1124,12 @@ drivers:
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nodes:
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- name: Core
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input: Generic clock generator 2
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external: false
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external_frequency: 0
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- name: Slow
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input: Generic clock generator 3
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external: false
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external_frequency: 0
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configuration:
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core_gclk_selection: Generic clock generator 2
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slow_gclk_selection: Generic clock generator 3
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@ -1153,8 +1171,12 @@ drivers:
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nodes:
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- name: Core
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input: Generic clock generator 2
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external: false
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external_frequency: 0
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- name: Slow
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input: Generic clock generator 3
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external: false
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external_frequency: 0
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configuration:
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core_gclk_selection: Generic clock generator 2
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slow_gclk_selection: Generic clock generator 3
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@ -1196,8 +1218,12 @@ drivers:
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nodes:
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- name: Core
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input: Generic clock generator 2
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external: false
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external_frequency: 0
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- name: Slow
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input: Generic clock generator 3
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external: false
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external_frequency: 0
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configuration:
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core_gclk_selection: Generic clock generator 2
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slow_gclk_selection: Generic clock generator 3
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@ -1239,8 +1265,12 @@ drivers:
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nodes:
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- name: Core
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input: Generic clock generator 2
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external: false
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external_frequency: 0
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- name: Slow
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input: Generic clock generator 3
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external: false
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external_frequency: 0
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configuration:
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core_gclk_selection: Generic clock generator 2
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slow_gclk_selection: Generic clock generator 3
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@ -1284,8 +1314,12 @@ drivers:
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nodes:
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- name: Core
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input: Generic clock generator 2
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external: false
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external_frequency: 0
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- name: Slow
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input: Generic clock generator 3
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external: false
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external_frequency: 0
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configuration:
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core_gclk_selection: Generic clock generator 2
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slow_gclk_selection: Generic clock generator 3
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@ -1328,6 +1362,8 @@ drivers:
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nodes:
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- name: USB
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input: Generic clock generator 1
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external: false
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external_frequency: 0
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configuration:
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usb_gclk_selection: Generic clock generator 1
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pads:
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@ -59,6 +59,10 @@ extern "C" {
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/** Uses common SPI async device driver transfer callback type. */
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#define _spi_m_async_dev_cb_xfer_t _spi_async_dev_cb_xfer_t
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/**
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* \name HPL functions
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*/
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//@{
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/**
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* \brief Initialize SPI for access with interrupts
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* It will load default hardware configuration and software struct.
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@ -229,6 +233,7 @@ int32_t _spi_m_async_register_callback(struct _spi_m_async_dev *dev, const enum
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*/
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void _spi_m_async_set_irq_state(struct _spi_m_async_dev *const device, const enum _spi_m_async_dev_cb_type type,
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const bool state);
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//@}
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#ifdef __cplusplus
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}
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@ -53,6 +53,10 @@ extern "C" {
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#define _spi_m_dma_dev_cb_type _spi_dma_dev_cb_type
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/**
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* \name HPL functions
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*/
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//@{
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/**
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* \brief Initialize SPI for access with interrupts
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* It will load default hardware configuration and software struct.
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*/
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int32_t _spi_m_dma_transfer(struct _spi_m_dma_dev *dev, uint8_t const *txbuf, uint8_t *const rxbuf,
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const uint16_t length);
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//@}
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#ifdef __cplusplus
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}
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@ -47,9 +47,13 @@
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extern "C" {
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#endif
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/** Uses common SPI async device driver. */
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/** Uses common SPI sync device driver. */
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#define _spi_m_sync_dev _spi_sync_dev
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/**
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* \name HPL functions
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*/
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//@{
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/**
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* \brief Initialize SPI for access without interrupts
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* It will load default hardware configuration and software struct.
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@ -118,7 +122,7 @@ int32_t _spi_m_sync_set_mode(struct _spi_m_sync_dev *dev, const enum spi_transfe
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int32_t _spi_m_sync_set_baudrate(struct _spi_m_sync_dev *dev, const uint32_t baud_val);
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/**
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* \brief Set SPI baudrate
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* \brief Set SPI char size
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* \param[in, out] dev Pointer to the SPI device instance.
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* \param[in] char_size The character size, see \ref spi_char_size.
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* \return Operation status.
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* \retval >=0 Number of characters transferred.
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*/
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int32_t _spi_m_sync_trans(struct _spi_m_sync_dev *dev, const struct spi_msg *msg);
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//@}
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#ifdef __cplusplus
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}
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@ -58,6 +58,10 @@ extern "C" {
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/** Uses common SPI async device driver transfer callback type. */
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#define _spi_s_async_dev_cb_xfer_t _spi_async_dev_cb_xfer_t
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/**
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* \name HPL functions
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*/
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//@{
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/**
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* \brief Initialize SPI for access with interrupts
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* It will load default hardware configuration and software struct.
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@ -218,6 +222,7 @@ int32_t _spi_s_async_register_callback(struct _spi_s_async_dev *dev, const enum
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*/
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void _spi_s_async_set_irq_state(struct _spi_s_async_dev *const device, const enum _spi_async_dev_cb_type type,
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const bool state);
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//@}
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#ifdef __cplusplus
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}
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@ -46,9 +46,13 @@
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extern "C" {
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#endif
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/** Uses common SPI async device driver. */
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/** Uses common SPI sync device driver. */
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#define _spi_s_sync_dev _spi_sync_dev
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/**
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* \name HPL functions
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*/
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//@{
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/**
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* \brief Initialize SPI for access without interrupts
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* It will load default hardware configuration and software struct.
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* \retval false Error not detected
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*/
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bool _spi_s_sync_is_error(struct _spi_s_sync_dev *dev);
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//@}
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#ifdef __cplusplus
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}
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