USRP1 library (taken from gnuradio where it had been abandoned)
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eb 1e6197dd77 Merged gcell, the Cell SPE scheduler and RPC mechanism into the trunk.
(eb/trunk-with-gcell r8037:8085).  Expect additional tweaks, but
currently works and passes distcheck.


git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@8086 221aa14e-8319-0410-a670-987f0aec2ac5
2008-03-24 06:09:29 +00:00
doc Added CMD_SEND_*, moved ports to SRC and DST regs 2007-09-05 19:14:11 +00:00
firmware Merged gcell, the Cell SPE scheduler and RPC mechanism into the trunk. 2008-03-24 06:09:29 +00:00
fpga Restores 8-bit sample format support to FPGA code. Synthesized with 7.1SP1. 2007-11-10 19:23:57 +00:00
host Merged build_config branch into trunk: 2008-02-21 19:16:45 +00:00
AUTHORS Houston, we have a trunk. 2006-08-03 04:51:51 +00:00
ChangeLog Updated license from GPL version 2 or later to GPL version 3 or later. 2007-07-21 03:44:38 +00:00
Makefile.am Merged r6224:6268 from features/deb into trunk. Implements most of a Debian package generation system. EXPERIMENTAL. 2007-09-02 21:20:24 +00:00
README Cleaned up top-level README, and fixed or deleted lower level ones as 2006-08-04 01:54:23 +00:00
usrp-inband.pc.in Merged r7769:7873 from michaelld/bc_behavior into trunk. 2008-02-29 04:00:13 +00:00
usrp.inf Houston, we have a trunk. 2006-08-03 04:51:51 +00:00
usrp.iss.in Updated license from GPL version 2 or later to GPL version 3 or later. 2007-07-21 03:44:38 +00:00
usrp.pc.in Merged r7769:7873 from michaelld/bc_behavior into trunk. 2008-02-29 04:00:13 +00:00

README

#
# README -- the short version
#

The top level makefile handles the host code and FX2 firmware.

Besides the normal gcc suite and all the auto tools, you'll need
the SDCC free C compiler to build the firmware.  You MUST
USE VERSION 2.4.0 or VERSION 2.5.0 due to some problems with variable
initialization.  http://sdcc.sourceforge.net


The high level interface to the USRP using our standard FPGA bitstram
is contained in usrp/host/lib/usrp_standard.h

If you've got doxygen installed, there are html docs in
usrp/doc/html/index.html


# Compiling the verilog (not required unless you're modifying it)

If you want to build the FPGA .rbf file from source (not required; we
provide pre-compiled .rbf files in usrp/fpga/rbf directory), you'll
need Altera's no cost Quartus II development tools.  We're currently
building with Quartus II 5.1sp1 Web Edition.  The project file is
usrp/fpga/toplevel/usrp_std/usrp_std.qpf.  The toplevel verilog file
is usrp/fpga/toplevel/usrp_std/usrp_std.v.  The bulk of the verilog
modules are contained in usrp/fpga/sdr_lib