mirror of https://gerrit.osmocom.org/libusrp
Added CMD_SEND_*, moved ports to SRC and DST regs
git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@6319 221aa14e-8319-0410-a670-987f0aec2ac5
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@ -24,16 +24,21 @@ registers
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TC_DMA_SRC_{0,3} [WR] ("traffic cop DMA source, channel N")
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(The {0,3} notation means there are four of these registers,
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one for each channel, named TC_DMA_SRC_0, TC_DMA_SRC_1,
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TC_DMA_SRC_2, TC_DMA_3.)
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Specifies where the writing port adapter writes info the buffer, and
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the maximum number of lines to write.
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5 9 9 9
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+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
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| MBZ | start | end (max) | step |
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|0| src | start | end (max) | step |
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+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
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src: source port number. E.g., 2 = ethernet MAC (the buffer writer)
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start: starting line number for transfer (32-bit lines)
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end: maximum number of lines to write
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end: index of last line to write. I.e., start = 0, end = 0, xfers 1 line.
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step: normally 1.
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@ -44,23 +49,24 @@ TC_DMA_DST_{0,3} [WR]
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5 9 9 9
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+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
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| MBZ | start | MBZ | step |
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|0| dst | start | end (max) | step |
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+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
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dst: destination port number. E.g., 1 = DSP pipeline (the buffer reader)
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start: starting line number tranfer (32-bit lines)
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end: Must be zero, unless a TC_DMA_CMD_SEND_0 or TC_DMA_CMD_SEND_1
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cmd is written to TC_DMA_CTRL_{0,3} in which case this
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specifies the index of the last line to send to the destination.
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step: normally 1.
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TC_DMA_CTRL_{0,3} [WR]
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4 4 1 19 4
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27 1 4
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+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
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| src | dst |A| MBZ | cmd |
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| MBZ |A| cmd |
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+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
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src: source port number. E.g., 2 = ethernet MAC (the buffer writer)
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dst: destination port number. E.g., 1 = DSP pipeline (the buffer reader)
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A: Set if "Host Approval" is required before beginning xfer to dst.
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Used to allow processor to inspect packet for s/w dispatch. If set,
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@ -72,12 +78,14 @@ TC_DMA_CTRL_{0,3} [WR]
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cmd: command
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TC_DMA_CMD_RESET 0 // abort active tranfers now; reset to idle state
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TC_DMA_CMD_START 1 // begin transfers according to src, dst, A
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TC_DMA_CMD_START 1 // begin transfers according
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TC_DMA_CMD_STOP 2 // stop transfers at completion of current buffer
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TC_DMA_CMD_APPROVE_0 3 // host approves xfer on even buffer, continue
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TC_DMA_CMD_APPROVE_1 4 // host approves xfer on odd buffer, continue
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TC_DMA_CMD_DROP_0 5 // host naks xfer on even buffer, drop buffer and continue
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TC_DMA_CMD_DROP_1 6 // host naks xfer on even buffer, drop buffer and continue
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TC_DMA_CMD_SEND_0 7 // copy buffer 0 to destination (processor init'd buffer)
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TC_DMA_CMD_SEND_1 8 // copy buffer 1 to destination (processor init'd buffer)
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TC_DMA_STATUS_{0,3} [RD]
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@ -109,7 +117,7 @@ requested number of lines have been written into the buffer.
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I also want a "global status register" that pulls the 4 flag bits
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I also want a "global status register" that pulls the N flag bits
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from each of the 4 status registers into a single word. This should
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allow me to read a single word to figure out what to do.
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@ -117,12 +125,13 @@ allow me to read a single word to figure out what to do.
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TC_DMA_STATUS_GLOBAL [RD]
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+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
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| MBZ |flags3 |flags2 |flags1 |flags0 |
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| flags3 | flags2 | flags1 | flags0 |
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+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
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I'm sure I've missed something...
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What do you think?
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// some kind of registers to enable and ack interrupts
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TC_DMA_INTR_EN [WR] // enable particular interrupts
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TC_DMA_INTR_CLR [WR] // clear particular pending interrupts
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Eric
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