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609 Commits

Author SHA1 Message Date
aliguori c0ce998e94 Use sys-queue.h for break/watchpoint managment (Jan Kiszka) 
This switches cpu_break/watchpoint_* to TAILQ wrappers, simplifying the
code and also fixing a use after release issue in
cpu_break/watchpoint_remove_all.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5799 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-25 22:13:57 +00:00
aliguori a1d1bb3101 Refactor and enhance break/watchpoint API (Jan Kiszka) 
This patch prepares the QEMU cpu_watchpoint/breakpoint API to allow the
succeeding enhancements this series comes with.

First of all, it overcomes MAX_BREAKPOINTS/MAX_WATCHPOINTS by switching
to dynamically allocated data structures that are kept in linked lists.
This also allows to return a stable reference to the related objects,
required for later introduced x86 debug register support.

Breakpoints and watchpoints are stored with their full information set
and an additional flag field that makes them easily extensible for use
beyond pure guest debugging.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5738 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-18 20:07:32 +00:00
aliguori 6b9175478e Refactor translation block CPU state handling (Jan Kiszka) 
This patch refactors the way the CPU state is handled that is associated
with a TB. The basic motivation is to move more arch specific code out
of generic files. Specifically the long #ifdef clutter in tb_find_fast()
has to be overcome in order to avoid duplicating it for the gdb
watchpoint fixes (patch "Restore pc on watchpoint hits").

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5736 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-18 19:46:41 +00:00
aliguori 622ed3605b Convert CPU_PC_FROM_TB to static inline (Jan Kiszka) 
as macros should be avoided when possible.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5735 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-18 19:36:03 +00:00
pbrook a7812ae412 TCG variable type checking. 
Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-17 14:43:54 +00:00
aurel32 da80682b42 target-mips: avoid tcg internal error in mfc0/dmfc0 
Set t0 to 0 for unimplemented mfc0/dmfc0 instructions. This fixes a tcg
internal error while booting mips linux.

Noticed by Julia Longtin.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5723 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-15 12:12:08 +00:00
aurel32 de9a95f022 Revert commits 5685 to 5688 committed by mistake 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5691 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-11 13:41:01 +00:00
aurel32 1c58b16694 Don't stop translation for mtc0 compare 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5686 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-11 13:30:37 +00:00
aurel32 a6e92a658b target-mips: gen_compute_branch1() 
Optimize code generation in gen_compute_branch1():
- Directly use I32 variables instead of converting values from _tl to
  _i32 and back to _tl.
- Write the result directly to bcond instead of passing by a local
  variable.
- Temp variables are valid up to and *including* the brcond instruction.
  Use them instead of temp local variables.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5684 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-11 11:50:51 +00:00
aurel32 9bf3eb2ca5 target-mips: optimize movc*() 
Optimize code generation in gen_movc*():
- Temp variables are valid up to and *including* the brcond instruction.
  Use them instead of temp local variables.
- Avoid using temporary variables to transfer values.
- Access fpu_fcr31 directly in gen_movcf_ps().

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5683 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-11 11:50:43 +00:00
aurel32 2a0ab99899 target-mips: optimize gen_farith() 
Optimize code generation in gen_farith():
- Temp variables are valid up to and *including* the brcond instruction.
  Use them instead of temp local variables.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5682 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-11 11:50:33 +00:00
aurel32 b10fa3c906 target-mips: optimize gen_muldiv() 
Optimize code generation in gen_muldiv():
- Don't do sign extension when the value is already guaranteed to be
  sign extended (otherwise, results are marked as UNPREDICTABLE).
- Access the LO, HI registers directly instead of writting them through
  a temporary variable.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5681 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-11 11:50:25 +00:00
aurel32 507563e85d target-mips: optimize gen_arith()/gen_arith_imm() 
Optimize code generation in gen_arith()/gen_arith_imm():
- Don't do sign extension when the value is already guaranteed to be
  sign extended (otherwise, results are marked as UNPREDICTABLE).
- When the value is sign extended, compare the value to 0 instead of
  testing bit 31/63.
- Temp variables are valid up to and *including* the brcond instruction.
  Use them instead of temp local variables.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5680 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-11 11:50:17 +00:00
aurel32 49bcf33cc7 target-mips: convert bit shuffle ops to TCG 
Bit shuffle operations can be written with very few TCG instructions
(between 5 and 8), so it is worth converting them to TCG.

This code also move all bit shuffle generation code to a separate
function in order to have a cleaner exception code path, that is it
doesn't store back the TCG register to the target register after the
exception, as the TCG register doesn't exist anymore.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5679 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-11 11:47:06 +00:00
aurel32 505ad7c2ff target-mips: convert bitfield ops to TCG 
Bitfield operations can be written with very few TCG instructions
(between 2 and 5), so it is worth converting them to TCG.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5678 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-11 11:46:58 +00:00
aurel32 2623c1ecfc target-mips: optimize gen_op_addr_add() (2/2) 
Instead of dynamically generating different code depending on the UX
flag, add a new flag in ctx->flags to generate different code.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5677 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-11 11:39:33 +00:00
aurel32 d144d1d9e5 target-mips: optimize gen_op_addr_add() (1/2) 
The user mode can be tested at translation time using ctx->hflags.
This simplifies gen_op_addr_add().

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5676 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-11 11:36:52 +00:00
aurel32 1eb75d4a36 target-mips: optimize gen_save_pc() 
We obviously don't need to use a temporary variable to write PC.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5675 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-11 11:36:04 +00:00
aurel32 add69063e8 target-mips: fix mft* helpers/call 
This patch attempts to fix mft* helpers and the associated TCG calls.
mft* helpers do not take a register in argument, however:
- some helpers are called with an argument while they do not take one.
- some helpers are declared with an argument they don't use.

Acked-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5674 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-11 11:34:39 +00:00
aurel32 c24135ffcc target-mips: fix temporary variable freeing in op_ldst_##insn() 
Move tcg_temp_free() out of the conditional part to make sure
the TCG temporary variable is freed in all cases.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Acked-by: Thiemo Seufer <ths@networkno.de>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5673 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-11 11:34:30 +00:00
aurel32 e00fcff710 target-mips: use the new rotr/rotri instructions 
Acked-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5622 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-11-04 19:13:47 +00:00
blueswir1 e18231a3ff Show size for unassigned accesses (Robert Reif) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5436 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-10-06 18:46:28 +00:00
ths cb2c9921f8 Use concet TCG instructions in the MIPS target. 
Signed-off-by: Thiemo Seufer <ths@networkno.de>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5303 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-22 21:54:00 +00:00
ths 9c67ef0cb5 Fix Xcontext fill, by Here Poussineau. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5284 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-21 21:21:26 +00:00
pbrook 36aa55dcd9 Add concat_i32_i64 op. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5280 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-21 13:48:32 +00:00
ths 4b2eb8d275 Use TCG registers for most CPU register accesses. 
Signed-off-by: Thiemo Seufer <ths@networkno.de>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5253 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-18 11:59:03 +00:00
ths f01be15458 Move the active FPU registers into env again, and use more TCG registers 
to access them.

Signed-off-by: Thiemo Seufer <ths@networkno.de>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5252 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-18 11:57:27 +00:00
aurel32 bbc0d79cb7 MIPS: Fix tlbwi/tlbwr 
In CP0 Index register, bit 31 means 'Probe Failure', while lowest bits
contain the TLB index.

In tlbwi and tlbwr instructions, this Probe Failure bit must be ignored
when reading the TLB index.

Attached patch fixes it.

(Hervé Poussineau)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5215 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-14 17:09:56 +00:00
aurel32 75973fa1ee MIPS: remove empty cpu_mips_irqctrl_init() 
cpu_mips_irqctrl_init() function in hw/mips_timer.c is empty.
Attached patch removes it, and its callers.

(Hervé Poussineau)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5214 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-14 16:38:57 +00:00
aurel32 929a62a0d7 target-mips: fix warning 
Attached patch fixes a warning in cpu_mips_find_by_name().
'name' is a string, so it should be declared as char*, not unsigned char*.

(Hervé Poussineau)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5213 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-14 16:28:26 +00:00
aurel32 2fdbad255e TCG fixes for target-mips 
This patch fixes TCG errors reported on the MIPS target when TCG_DEBUG
is enabled.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Acked-by: Thiemo Seufer <ths@networkno.de>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5164 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-05 14:19:17 +00:00
ths f8a6ec5817 Build fix for gcc-3.3. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5139 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-09-02 17:39:45 +00:00
blueswir1 79383c9c08 Fix some warnings that would be generated by gcc -Wredundant-decls 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5115 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-30 09:51:20 +00:00
aurel32 492b239197 MIPS: don't free TCG temporary variable twice 
In gen_dmtc0 function, TCG temporary variable t0 is freed at the end of
the function. Variable is freed again in the gen_dmtc0 caller.
I removed the free in gen_dmtc0, to do like in gen_dmfc0, gen_mfc0,
gen_mtc0.

(Hervé Poussineau)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5075 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-23 17:22:19 +00:00
ths 0fd70f8f20 Delete unused variable. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4981 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-08-01 17:14:35 +00:00
ths c904ef0e7c Use plain standard inline. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4929 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-23 16:16:31 +00:00
ths 0eaef5aa01 Less hardcoding of TARGET_USER_ONLY. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4928 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-23 16:14:22 +00:00
ths 8706c3824f A bunch of minor code improvements in the MIPS target. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4921 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-21 21:38:04 +00:00
ths 3d5be8709b Fix logging output for MIPS HI, LO registers, by Stefan Weil. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4916 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-21 07:46:03 +00:00
ths 50366fe93a Fix compiler warning, by Stefan Weil. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4915 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-20 19:13:19 +00:00
ths 920c608ef3 Simplify conditional FP moves. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4913 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-20 18:48:42 +00:00
ths 2cfc5f17d3 Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4891 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-18 18:01:29 +00:00
ths b6d96beda3 Use temporary registers for the MIPS FPU emulation. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4861 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-09 11:05:10 +00:00
ths c7e8a937b7 Fix typo in comment. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4852 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-05 21:54:32 +00:00
ths 63742cf887 Change MIPS machine default to Malta. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4851 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-05 21:51:47 +00:00
pbrook 9656f324d2 Move interrupt_request and user_mode_only to common cpu state. 
Save and restore env->interrupt_request and env->halted.



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4817 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-01 20:01:19 +00:00
ths 356265ae4a Static'ify some functions, and use standard inline in translate.c. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4813 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-01 16:37:52 +00:00
ths ea334207a3 Delete duplicate code. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4811 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-07-01 08:45:45 +00:00
ths bf20dc076b Spelling fixes, spotted by Stuart Brady. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4809 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-30 17:22:19 +00:00
pbrook b3c7724cbc Move CPU save/load registration to common code. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4808 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-30 16:31:04 +00:00
ths d077b6f759 Make bcond and btarget TCG registers. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4805 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-30 11:30:34 +00:00
ths d26968ecd8 Remove unnecessary helper arguments, and fix some typos. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4802 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-29 14:53:11 +00:00
pbrook dd5d6fe913 Add missing file. Fix spelling errors. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4800 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-29 10:43:16 +00:00
pbrook 2e70f6efa8 Add instruction counter. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4799 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-29 01:03:05 +00:00
ths 2796188e56 Avoid unused input arguments which triggered tcg errors. Spotted by 
Stefan Weil.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4795 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-27 10:03:42 +00:00
ths b5dc7732e1 More efficient target register / TC accesses. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4794 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-27 10:02:35 +00:00
ths ebbd0ffddd Clarify some TODO items. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4789 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-24 22:04:41 +00:00
ths 1a3fd9c3da Remove remaining uses of T0 in the MIPS target. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4788 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-24 21:58:35 +00:00
ths e1bf387ec8 T1 is now dead. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4787 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-24 20:13:20 +00:00
ths 7872368461 Reduce use of fixed registers a bit more. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4786 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-24 20:12:33 +00:00
ths 6c5c1e2057 Use temporaries instead of fixed registers for some instructions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4784 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-24 15:12:27 +00:00
ths be24bb4f30 Pass T0/T1 explicitly to helper functions, and clean up a few dyngen 
leftovers.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4780 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-23 12:57:09 +00:00
ths 3f05d3dc14 Delete obsolete file. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4762 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-20 15:29:38 +00:00
ths b6a8c26b60 Delete obsolete file. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4761 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-20 15:21:28 +00:00
ths 3fafcb48f9 Delete obsolete prototypes. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4760 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-20 15:20:35 +00:00
ths c8c2227e91 Convert unaligned load/store to TCG. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4759 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-20 15:12:14 +00:00
ths 92af06d216 Convert vr54xx multiply instructions to TCG. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4756 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-20 14:35:19 +00:00
ths caa88be0f5 Remove now-dead code. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4754 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-19 18:38:40 +00:00
ths a16336e479 Convert remaining MIPS FP instructions to TCG. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4753 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-19 18:35:02 +00:00
ths 214c465f86 Switch the standard multiplication instructions to TCG. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4740 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-12 12:43:29 +00:00
ths 2b0233abfb Switch bitfield instructions and assorted special ops to TCG. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4739 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-12 12:42:35 +00:00
ths 200ae688b2 TCGify the simplest FP instructions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4737 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-12 03:17:06 +00:00
ths 08ba79632f TCGify a few more instructions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4736 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-12 03:15:13 +00:00
ths 2681b45add Update TODO list. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4735 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-11 20:58:36 +00:00
ths 5d0fc900d3 Call most FP helpers without deroute through op.c 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4734 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-11 15:27:54 +00:00
ths 0d1d0094d7 Delete obsolete file. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4733 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-11 13:24:47 +00:00
ths aa0bf00b65 Switch most MIPS FP load/stores to TCG. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4732 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-11 13:02:57 +00:00
ths faf7aaa918 Avoid gen_opc_buf overflow. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4731 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-11 12:26:29 +00:00
ths 9843a0d2c6 Free some more temporaries. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4729 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-11 10:40:33 +00:00
ths 764dfc3fa0 Move FP TNs to cpu env. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4728 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-11 10:39:48 +00:00
ths 2c2435bdd4 Fix data type mixup, spotted by malc. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4724 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-10 01:18:32 +00:00
ths f1aa63203d Switch remaining CP0 instructions to TCG or helper functions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4708 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-09 07:13:38 +00:00
ths 7dd9e556e3 Register helper functions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4700 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-08 07:42:23 +00:00
ths c239529e7f Free constant temporaries. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4670 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-05 08:38:44 +00:00
ths 4f57689a8d Explicitly free temporaries. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4667 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-04 17:37:03 +00:00
ths 29cf4b7516 Remove the temporaries cache of the MIPS target. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4666 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-04 17:36:02 +00:00
ths b6ce8f0aea Fix pointer calculation for MIPS64 targets. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4665 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-04 17:34:54 +00:00
ths 0fead1259a Delete duplicate code. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4656 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-04 04:21:01 +00:00
ths f5b78d4fea Fix type mismatch. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4652 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-02 09:35:46 +00:00
ths a569557f52 Fix argument order. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4651 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-02 08:24:41 +00:00
ths 619dfca13a Proper sign extensions for 32-bit divisions, spotted by Richard Sandiford. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4650 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-06-02 07:15:18 +00:00
pbrook f8ed7070ea Fix typo. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4624 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-30 17:54:15 +00:00
pbrook 6e68e076e7 Move clone() register setup to target specific code. Handle fork-like clone. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4623 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-30 17:22:15 +00:00
ths a4a99d71b2 Fix for 32-bit MIPS. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4622 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-30 00:12:52 +00:00
ths 90cb786c41 Avoid qemu SIGFPE for MIPS DIV, by Richard Sandiford. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4621 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-29 18:29:05 +00:00
ths 9b686843a0 Fix truncate/extend reversal in MIPS DIV{, U} handling, by Richard Sandiford. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4620 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-29 18:28:07 +00:00
ths 84774e8ea3 Fix modulus result from MIPS DDIV & avoid overflowing division, 
by Richard Sandiford.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4619 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-29 18:23:31 +00:00
bellard 9133e39b84 Push common interrupt variables to cpu-defs.h (Glauber Costa) 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4612 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-29 10:08:06 +00:00
bellard ce5232c5c2 moved halted field to CPU_COMMON 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4609 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-28 17:14:10 +00:00
ths 893f986502 Honour current_tc for MIPS M{T,F}{HI,LO}, by Richard Sandiford. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4604 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-28 13:37:19 +00:00
pbrook 9b7b85d260 Fix off-by-one unwinding error. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4570 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-25 00:36:06 +00:00
ths e6bb7d7efd Fix mov[tf].ps handling for MIPS, by Richard Sandiford. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4563 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-24 19:46:23 +00:00
ths 2784847001 Un-break MIPS conditional moves, by Richard Sandiford. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4562 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-24 19:06:07 +00:00
pbrook cb63669a54 Fix ARM conditional branch bug. 
Add tcg_gen_brcondi.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4552 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-24 02:22:00 +00:00
ths f0b3f3ae5d Swithc some MIPS CP0 accesses to TCG. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4546 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-23 18:10:51 +00:00
ths e214b9bb55 Switch MIPS movf/movt to TCG. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4545 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-23 18:06:27 +00:00
ths 95af5ce5e2 Fix build failure for MIPS64 targets on 64-bit hosts. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4536 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-23 01:31:57 +00:00
ths 42388c4ba7 Delete dead code. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4535 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-22 20:42:15 +00:00
ths 8e9ade681b Switch MIPS branch handling to TCG, and clean out pointless wrapper 
functions/macros.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4533 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-22 17:46:10 +00:00
ths 30898801ad Switch MIPS clo/clz and the condition tests to TCG. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4507 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-21 02:04:15 +00:00
ths 20c4c97c9b Switch MIPS movn/movz to TCG. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4506 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-21 02:02:39 +00:00
ths 4eecc06ed0 Add file left out from previous commit. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4497 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-18 23:39:23 +00:00
ths 48d38ca52b Switch most MIPS logical and arithmetic instructions to TCG. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4496 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-18 22:50:49 +00:00
ths 8c99506cfb Fix local register cache handling. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4495 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-18 22:15:12 +00:00
bellard a607922c75 fixed do_restore_state() 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4413 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-10 15:42:17 +00:00
ths 1ffc346f95 Be more economical with local temporaries. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4384 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-07 18:18:09 +00:00
ths bec19c0932 Mention missing CPU save/restore. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4381 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-07 15:39:12 +00:00
ths cdf5cf540b Delete redundant prototype. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4379 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-07 15:29:58 +00:00
ths 58565070ee Delete more obsolete dyngen ops. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4372 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-07 13:47:01 +00:00
ths 6a2d4d49f9 Delete obsolete MIPS dyngen ops. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4370 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-07 09:56:06 +00:00
ths aaa9128a02 Convert some MIPS load/store instructions to TCG. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4369 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-06 21:40:48 +00:00
ths 36271893ab Enable 64-bit FPU only for NewABI. Spotted by Vince Weaver. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4368 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-06 20:48:02 +00:00
ths 958fb4a92c Use TCG for MIPS GPR moves. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4356 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-06 10:57:59 +00:00
ths b7ef7bf225 Fix MIPS64 branches. Funny how this survived testing. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4355 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-06 10:03:16 +00:00
aurel32 4586f9e9a1 Really really revert commit r4343 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4348 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-05 21:42:19 +00:00
aurel32 e34d2d62a3 Really revert commit r4343 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4347 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-05 21:35:09 +00:00
aurel32 d478990a52 Don't stop translation for mtc0 compare 
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4343 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-05 21:27:01 +00:00
aurel32 8dd3dca351 remove target ifdefs from vl.c 
(Glauber Costa)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4327 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-04 13:11:44 +00:00
ths 3945462805 Simplify mips branch handling. Retire T2 from use. Use TCG for branches. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4320 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-04 08:16:10 +00:00
ths 5b2808bfc0 Fix MIPS MT GPR accesses, thanks Stefan Weil. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4307 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-05-03 11:06:59 +00:00
aurel32 d2856f1ad4 Factorize code in translate.c 
(Glauber Costa)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4274 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-28 00:32:32 +00:00
aurel32 ca10f86763 Remove osdep.c/qemu-img code duplication 
(Kevin Wolf)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4191 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-04-11 21:35:42 +00:00
ths 53715e48b0 Fix infinite loop when invalidating TLB, by Herve Poussineau. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4136 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-03-29 21:43:23 +00:00
ths d0dc7dc327 Make MIPS MT implementation more cache friendly. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3981 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-02-12 21:01:26 +00:00
bellard 57fec1fee9 use the TCG code generator 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3944 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-02-01 10:50:11 +00:00
ths a139a3ad23 Fix typo which broke MIPS32R2 64-bit FPU support. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3902 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-01-09 12:03:22 +00:00
ths 6b5435d77c Fix broken absoluteness check for cabs.d.*. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3900 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-01-08 18:11:08 +00:00
ths b67bfe8d9f Handle some more exception types. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3886 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-01-04 17:52:57 +00:00
ths 9a5d878f6e Fix exception debug output. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3885 c046a42c-6fe2-441c-8c8c-71466251a162
 2008-01-03 21:26:23 +00:00
ths b8aa4598e2 MIPS COP1X (and related) instructions, by Richard Sandiford. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3877 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-30 15:36:58 +00:00
ths ea4b07f762 Set FCR0.F64 for MIPS64R2-generic, by Richard Sandiford. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3865 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-28 12:35:05 +00:00
ths 14e51cc7a4 De-cruft exception definitions, and implement nicer debug output. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3861 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-26 19:34:03 +00:00
ths e9c71dd1c1 Support for VR5432, and some of its special instructions. Original patch 
by Dirk Behme.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3859 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-25 20:46:56 +00:00
ths 29fe0e3490 5K and 20K are Release 1 CPUs. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3858 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-25 17:32:46 +00:00
ths 306ab3e86a Avoid host FPE for overflowing division on MIPS, by Richard Sandiford. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3856 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-25 03:18:19 +00:00
ths 6d35524c40 Improved PABITS handling, and config register fixes. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3855 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-25 03:13:56 +00:00
ths b352fa43ea Update debug code to match new accumulator register layout. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3853 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-24 16:24:42 +00:00
ths a1daafd8df Fix CCRes value for 20Kc. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3849 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-24 14:33:57 +00:00
ths 0300e3faf6 MIPS TODO: mention unimplemented system controllers. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3830 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-17 03:53:42 +00:00
ths bbbe9b8822 Update MIPS TODO. The mipsnet failure is caused by a kernel bug. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3829 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-17 03:50:28 +00:00
ths 01ba98161f Handle cpu_model in copy_cpu(), by Kirill A. Shutemov. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3778 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-09 02:22:57 +00:00
ths dab6322b86 Larger physical address space for 32-bit MIPS. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3765 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-12-02 07:14:17 +00:00
ths ae2dbf7fb0 Micro-optimize back-to-back store-load sequences. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3743 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-26 09:01:34 +00:00
ths 185f07621f Optimize the conventional move operation. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3720 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-22 15:10:21 +00:00
ths 67d6abff60 Fix off-by-one address checks in MIPS64 MMU, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3718 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-22 00:34:36 +00:00
ths 8d162c2b68 Add older 4Km variants. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3708 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-19 16:10:33 +00:00
pbrook f090c9d4ad Add strict checking mode for softfp code. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3688 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-18 14:33:24 +00:00
ths c6d6dd7c74 Fix MIPS64 R2 instructions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3686 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-18 03:36:07 +00:00
ths 8c89395eeb Use a valid PRid. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3685 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-18 03:19:58 +00:00
pbrook 5747c0733d Fix int/float inconsistencies. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3672 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-17 14:53:06 +00:00
ths 3e4587d5d1 Introduce 4KEm configuration with fixed MMU mapping. Delete bogus INSN_DSP 
flags.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3637 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-14 03:11:17 +00:00
bellard aaed909a49 added cpu_model parameter to cpu_init() 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-10 15:15:54 +00:00
ths 8f6f6026f1 Use FORCE_RET, scrap RETURN which was implemented in target-specific code. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3560 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-09 23:09:41 +00:00
ths 7df526e317 Move kernel loader parameters from the cpu state to being board specific. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3557 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-09 17:52:11 +00:00
ths d26bc2118e Clean out the N32 macros from target-mips, and introduce MIPS ABI specific 
defines for linux-user.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3556 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-08 18:05:37 +00:00
ths 855cea8c92 Formatting fix. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3554 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-11-08 16:44:01 +00:00
ths 273af66025 Adjust s390 addresses (the MSB is defined as "to be ignored"). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3486 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-29 14:39:49 +00:00
ths d2123ead89 Preliminary MIPS64R2 mode. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3479 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-29 09:38:43 +00:00
ths 6276c76758 Fix logic bug which broke TLBL/TLBS handling somewhat. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3478 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-29 02:57:19 +00:00
ths 1b6fd0bc55 Restrict CP0_PerfCnt to legal values. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3476 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-29 00:49:32 +00:00
ths 623a930ec3 Implement missing MIPS supervisor mode bits. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3472 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-28 19:45:05 +00:00
ths 05f778c8bd Add sharable clz/clo inline functions and use them for the mips target. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3455 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-27 13:05:54 +00:00
ths 5592a750b9 The other half of the mul64 rework. Sorry for the breakage, I committed 
an incomplete version of what I tested.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3454 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-26 22:35:02 +00:00
ths 9f77c1cdcf Remove bogus instruction decode. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3433 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-24 00:52:07 +00:00
ths 6ad3872210 Force proper sign extension for mfc0/mfhc0 on MIPS64. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3432 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-24 00:10:32 +00:00
ths 60445285a8 Fix writable length of the index register. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3431 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-23 23:58:21 +00:00
ths 7d307e9edc Enforce proper sign extension for lwl/lwr on MIPS64. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3430 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-23 23:23:43 +00:00
ths 9278480e8f Fix CLO calculation for MIPS64. And a small code cleanup. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3428 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-23 23:22:03 +00:00
ths 7385ac0ba2 Use the standard ASE check for MIPS-3D and MT. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3427 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-23 17:04:27 +00:00
ths d8a5950a62 Switch bc1any* instructions off if no MIPS-3D is implemented. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3426 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-23 13:15:33 +00:00
ths 647de6ca24 Handle IBE on MIPS properly. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3416 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-20 19:45:44 +00:00
ths c7890fc209 Update TODO. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3402 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-17 13:43:58 +00:00
j_mayer 6ebbf39000 Replace is_user variable with mmu_idx in softmmu core, 
allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
  and #ifdef TARGET_xxx in softmmu core functions.
Implement per target mmu modes definitions. As an example, add PowerPC
  hypervisor mode definition and Alpha executive and kernel modes definitions.
Optimize PowerPC case, precomputing mmu_idx when MSR register changes
  and using the same definition in code translation code.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-14 07:07:08 +00:00
ths d0f48074db Update TODO. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3383 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-13 19:00:52 +00:00
ths 89fc88da4c Fix off-by-one in address check. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3382 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-13 17:29:09 +00:00
j_mayer c732abe222 Unify '-cpu ?' option. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3380 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-12 06:47:46 +00:00
ths aa34373598 Use always_inline in the MIPS support where applicable. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3375 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-09 03:39:58 +00:00
ths ab19cb4129 Delete file which should have been removed in the lst commit. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3373 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-09 03:17:28 +00:00
ths 4e9f853731 Fix [ls][wd][lr] instructions, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3372 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-10-09 03:12:08 +00:00
ths 540635ba65 Code provision for n32/n64 mips userland emulation. Not functional yet. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3284 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-30 01:58:33 +00:00
ths a09d88b86a Update TODO. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3278 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-30 00:45:51 +00:00
ths 671880e651 Supervisor mode implementation, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3267 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-29 19:21:36 +00:00
ths 544540979c Less magic constants. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3266 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-29 19:19:59 +00:00
ths 418d7c7169 Fix MIPS FP underflow handling, spotted by Daniel Jacobowitz. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3255 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-28 19:30:36 +00:00
ths 198a74de4c Move get_sp_from_cpustate from cpu.h to target_signal.h. 
Enable sigaltstack processing for more architectures.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3253 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-27 16:44:32 +00:00
ths a04e134ad1 linux-user sigaltstack() syscall, by Thayne Harbaugh. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3252 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-27 13:57:58 +00:00
ths 08fa4bab83 hflags computation cleanup, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3243 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-26 23:52:06 +00:00
ths fe253235b2 Wrap a few often used tests with unlikely(), by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3242 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-26 23:50:39 +00:00
ths 42532189df Timer start/stop implementation, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3237 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-25 16:53:15 +00:00
ths 387a8fe505 Optimise instructions accessing CP0, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3235 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-25 14:49:47 +00:00
ths e189e74868 Per-CPU instruction decoding implementation, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3228 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-24 12:48:00 +00:00
ths 2337fdc208 Fix mips usermode emulation. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3212 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-23 17:54:29 +00:00
j_mayer c068688b03 Extend TB flags to 64 bits (Alexander Graf). 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3198 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-20 22:47:42 +00:00
ths 3b46e62427 find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the regex. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3177 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-17 08:09:54 +00:00
ths 5fafdf24ef find -type f | xargs sed -i 's/[\t ]$//g' # on most files 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-16 21:08:06 +00:00
ths ce62e5ba09 Fix tb->size mishandling, by Daniel Jacobowitz. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3160 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-11 10:04:58 +00:00
ths ead9360e2f Partial support for 34K multithreading, not functional yet. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3156 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-09-06 00:18:15 +00:00
ths 3ddf0b5cde Disable 64-bit instructions on 32-bit CPU, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3146 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-08-26 17:37:23 +00:00
ths ae5d8053a1 Fix MIPS cache configuration, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3092 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-07-29 22:11:46 +00:00
ths 475d91106d Update TODO list. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3057 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-07-11 10:25:04 +00:00
ths 5e4ef64cfd Simplify round/ceil/floor implementation, spotted by Fabrice Bellard. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3031 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-28 14:07:05 +00:00
ths e3b60f1d9e Fix computation for ceil, floor and round instructions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3028 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-27 19:01:46 +00:00
ths 8dfdb87c8d Implement recip1/recip2/rsqrt1/rsqrt2. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3026 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-26 20:26:03 +00:00
ths 996ba2ccf5 MIPS64 improvements, based on a patch by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3021 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-25 17:34:33 +00:00
ths e034e2c39a Handle MIPS64 SEGBITS value correctly. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3011 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-23 18:04:12 +00:00
ths 17044c06b8 Allow emulation of 32bit targets in the MIPS64 capable qemu version. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3007 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-22 23:50:19 +00:00
ths 7bfd934a13 Fix write to K0 bits in Config0, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3006 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-22 11:50:17 +00:00
ths bd04c6feb9 Change 20Kc PRID to a later version. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2980 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-12 12:43:47 +00:00
ths 70cf0b63f1 R5k has PX implemented. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2963 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-09 12:29:32 +00:00
ths 9467d44c4d Move target-specific defines to the target directories. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2940 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-03 21:02:38 +00:00
ths bfed01fc79 Clean up of some target specifics in exec.c/cpu-exec.c. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2936 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-03 17:44:37 +00:00
ths 3a95e3a7d9 Check for R2 instructions, and throw RI if we don't emulate R2. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2921 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-02 00:25:12 +00:00
ths 1e3d0552f5 Update some comments, 64bit FPU support is functional regardless of 
funny non-standard fcr0 bits on earlier CPUs.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2919 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-01 21:57:32 +00:00
ths 8487327a1d Make sure hflags are updated for CP0_Status changes. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2918 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-01 17:47:07 +00:00
ths c13af1ef6c Update TODO. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2911 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-01 15:18:04 +00:00
ths c9c1a06457 Add support for 5Kc/5Kf/20Kc, based on a patch by Aurelien Jarno. 
Note that the F64 flag isn't usable on any of those (and the R4000),
so all our 64bit FPU goodness goes out of the window until a shadow
capability flag is implemented. :-(


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2910 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-01 14:58:56 +00:00
ths a7037b2950 Allow again FPU for usermode emulation. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2905 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-06-01 11:47:24 +00:00
ths 278d070272 Simplify code. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2904 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-31 23:42:46 +00:00
ths 33ac7f1630 Don't kill the registered irqs on reset. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2903 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-31 16:18:58 +00:00
ths 924b2c07cd Add proper float*_is_nan prototypes. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2902 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-31 16:17:52 +00:00
ths 51b2772f28 Fix CPU (re-)selection on reset. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2900 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-30 20:46:02 +00:00
ths 78749ba859 Fix usermode check, thanks Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2897 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-29 18:55:34 +00:00
ths 5e755519ac Don't check the FPU state for each FPU instruction, use hflags to 
handle this per-tb.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2896 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-29 16:52:57 +00:00
ths 6e473128b6 Handle PX/UX status flags correctly, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2892 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-28 20:36:48 +00:00
ths 12a4b2aa1d Fix ddivu for 32bit hosts, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2890 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-28 17:36:30 +00:00
ths c811cf2c03 Do not sign extend lwu, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2889 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-28 17:09:41 +00:00
ths 9b9e4393dd MIPS64 addressing fixes, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2888 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-28 17:03:28 +00:00
ths fd88b6abab The 24k wants more watch and srsmap registers. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2849 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-23 08:24:25 +00:00
ths df1561e22d The previous patch to make breakpoints work was a performance 
disaster, use a similiar hack as ARM does instead.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2848 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-23 08:18:27 +00:00
ths 3a5b360dac Catch more MIPS FPU cornercases, fix addr.ps and mulr.ps instructions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2841 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-20 13:27:58 +00:00
ths 93b12ccc62 Fix indexed FP load/store instructions. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2837 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-20 01:36:29 +00:00
ths 57fa1fb31c More MIPS 64-bit FPU support. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2834 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-19 20:29:41 +00:00
ths f469b9db01 Fix slti/sltiu for MIPS64, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2833 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-19 17:45:43 +00:00
ths 5d46d55d4b Fix ldl/ldr implementation, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2832 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-19 17:44:33 +00:00
ths fd4a04ebb2 - Move FPU exception handling into helper functions, since they are big. 
- Fix FP-conditional branches.
- Check FPU register mode at runtime, not translation time, as the F64
  status bit can change.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2828 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-18 11:55:54 +00:00
ths 34ae7b51f5 Work around the lack of proper handling for self-modifying code. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2827 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-18 01:13:09 +00:00
ths 69d357286d More generic 64 bit multiplication support, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2821 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-16 11:59:40 +00:00
ths 100ce98812 Full MIPS64 MMU implementation, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2820 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-13 19:22:13 +00:00
ths f1b0aa5de7 Fix mfc0 and dmtc0 instructions on MIPS64, by Aurelien Jarno. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2819 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-13 18:39:10 +00:00
ths 7b62f20c08 Delete misleading comment. 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2814 c046a42c-6fe2-441c-8c8c-71466251a162
 2007-05-13 15:29:26 +00:00