Mention missing CPU save/restore.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4381 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-07 15:39:12 +00:00 · 2008-05-07 15:39:12 +00:00 · bec19c0932
parent b5e817eac1
commit bec19c0932
1 changed files with 1 additions and 0 deletions
--- a/target-mips/TODO
+++ b/target-mips/TODO
@ -29,6 +29,7 @@ General
  To cope with these differences, Qemu currently flushes the TLB at
  each ASID change. Using the MMU modes to implement ASIDs hinges on
  implementing the global bit efficiently.
+- save/restore of the CPU state is not implemented (see machine.c).

 MIPS64
 ------