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Make MIPS MT implementation more cache friendly.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3981 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
ths 2008-02-12 21:01:26 +00:00
parent 577d8dd437
commit d0dc7dc327
12 changed files with 96 additions and 96 deletions

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@ -610,17 +610,17 @@ static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
ptr = mem_buf;
for (i = 0; i < 32; i++)
{
*(target_ulong *)ptr = tswapl(env->gpr[i][env->current_tc]);
*(target_ulong *)ptr = tswapl(env->gpr[env->current_tc][i]);
ptr += sizeof(target_ulong);
}
*(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Status);
ptr += sizeof(target_ulong);
*(target_ulong *)ptr = tswapl(env->LO[0][env->current_tc]);
*(target_ulong *)ptr = tswapl(env->LO[env->current_tc][0]);
ptr += sizeof(target_ulong);
*(target_ulong *)ptr = tswapl(env->HI[0][env->current_tc]);
*(target_ulong *)ptr = tswapl(env->HI[env->current_tc][0]);
ptr += sizeof(target_ulong);
*(target_ulong *)ptr = tswapl(env->CP0_BadVAddr);
@ -687,17 +687,17 @@ static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
ptr = mem_buf;
for (i = 0; i < 32; i++)
{
env->gpr[i][env->current_tc] = tswapl(*(target_ulong *)ptr);
env->gpr[env->current_tc][i] = tswapl(*(target_ulong *)ptr);
ptr += sizeof(target_ulong);
}
env->CP0_Status = tswapl(*(target_ulong *)ptr);
ptr += sizeof(target_ulong);
env->LO[0][env->current_tc] = tswapl(*(target_ulong *)ptr);
env->LO[env->current_tc][0] = tswapl(*(target_ulong *)ptr);
ptr += sizeof(target_ulong);
env->HI[0][env->current_tc] = tswapl(*(target_ulong *)ptr);
env->HI[env->current_tc][0] = tswapl(*(target_ulong *)ptr);
ptr += sizeof(target_ulong);
env->CP0_BadVAddr = tswapl(*(target_ulong *)ptr);

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@ -1522,7 +1522,7 @@ void cpu_loop(CPUMIPSState *env)
trapnr = cpu_mips_exec(env);
switch(trapnr) {
case EXCP_SYSCALL:
syscall_num = env->gpr[2][env->current_tc] - 4000;
syscall_num = env->gpr[env->current_tc][2] - 4000;
env->PC[env->current_tc] += 4;
if (syscall_num >= sizeof(mips_syscall_args)) {
ret = -ENOSYS;
@ -1532,7 +1532,7 @@ void cpu_loop(CPUMIPSState *env)
abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
nb_args = mips_syscall_args[syscall_num];
sp_reg = env->gpr[29][env->current_tc];
sp_reg = env->gpr[env->current_tc][29];
switch (nb_args) {
/* these arguments are taken from the stack */
/* FIXME - what to do if get_user() fails? */
@ -1543,20 +1543,20 @@ void cpu_loop(CPUMIPSState *env)
default:
break;
}
ret = do_syscall(env, env->gpr[2][env->current_tc],
env->gpr[4][env->current_tc],
env->gpr[5][env->current_tc],
env->gpr[6][env->current_tc],
env->gpr[7][env->current_tc],
ret = do_syscall(env, env->gpr[env->current_tc][2],
env->gpr[env->current_tc][4],
env->gpr[env->current_tc][5],
env->gpr[env->current_tc][6],
env->gpr[env->current_tc][7],
arg5, arg6/*, arg7, arg8*/);
}
if ((unsigned int)ret >= (unsigned int)(-1133)) {
env->gpr[7][env->current_tc] = 1; /* error flag */
env->gpr[env->current_tc][7] = 1; /* error flag */
ret = -ret;
} else {
env->gpr[7][env->current_tc] = 0; /* error flag */
env->gpr[env->current_tc][7] = 0; /* error flag */
}
env->gpr[2][env->current_tc] = ret;
env->gpr[env->current_tc][2] = ret;
break;
case EXCP_TLBL:
case EXCP_TLBS:
@ -2296,7 +2296,7 @@ int main(int argc, char **argv)
int i;
for(i = 0; i < 32; i++) {
env->gpr[i][env->current_tc] = regs->regs[i];
env->gpr[env->current_tc][i] = regs->regs[i];
}
env->PC[env->current_tc] = regs->cp0_epc;
}

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@ -23,7 +23,7 @@ typedef struct target_sigaltstack {
static inline abi_ulong get_sp_from_cpustate(CPUMIPSState *state)
{
return state->gpr[29][state->current_tc];
return state->gpr[state->current_tc][29];
}
#endif /* TARGET_SIGNAL_H */

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@ -23,7 +23,7 @@ typedef struct target_sigaltstack {
static inline abi_ulong get_sp_from_cpustate(CPUMIPSState *state)
{
return state->gpr[29][state->current_tc];
return state->gpr[state->current_tc][29];
}
#endif /* TARGET_SIGNAL_H */

View File

@ -23,7 +23,7 @@ typedef struct target_sigaltstack {
static inline target_ulong get_sp_from_cpustate(CPUMIPSState *state)
{
return state->gpr[29][state->current_tc];
return state->gpr[state->current_tc][29];
}
#endif /* TARGET_SIGNAL_H */

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@ -2131,7 +2131,7 @@ setup_sigcontext(CPUState *regs, struct target_sigcontext *sc)
err |= __put_user(regs->PC[regs->current_tc], &sc->sc_pc);
#define save_gp_reg(i) do { \
err |= __put_user(regs->gpr[i][regs->current_tc], &sc->sc_regs[i]); \
err |= __put_user(regs->gpr[regs->current_tc][i], &sc->sc_regs[i]); \
} while(0)
__put_user(0, &sc->sc_regs[0]); save_gp_reg(1); save_gp_reg(2);
save_gp_reg(3); save_gp_reg(4); save_gp_reg(5); save_gp_reg(6);
@ -2144,8 +2144,8 @@ setup_sigcontext(CPUState *regs, struct target_sigcontext *sc)
save_gp_reg(31);
#undef save_gp_reg
err |= __put_user(regs->HI[0][regs->current_tc], &sc->sc_mdhi);
err |= __put_user(regs->LO[0][regs->current_tc], &sc->sc_mdlo);
err |= __put_user(regs->HI[regs->current_tc][0], &sc->sc_mdhi);
err |= __put_user(regs->LO[regs->current_tc][0], &sc->sc_mdlo);
/* Not used yet, but might be useful if we ever have DSP suppport */
#if 0
@ -2205,11 +2205,11 @@ restore_sigcontext(CPUState *regs, struct target_sigcontext *sc)
err |= __get_user(regs->CP0_EPC, &sc->sc_pc);
err |= __get_user(regs->HI[0][regs->current_tc], &sc->sc_mdhi);
err |= __get_user(regs->LO[0][regs->current_tc], &sc->sc_mdlo);
err |= __get_user(regs->HI[regs->current_tc][0], &sc->sc_mdhi);
err |= __get_user(regs->LO[regs->current_tc][0], &sc->sc_mdlo);
#define restore_gp_reg(i) do { \
err |= __get_user(regs->gpr[i][regs->current_tc], &sc->sc_regs[i]); \
err |= __get_user(regs->gpr[regs->current_tc][i], &sc->sc_regs[i]); \
} while(0)
restore_gp_reg( 1); restore_gp_reg( 2); restore_gp_reg( 3);
restore_gp_reg( 4); restore_gp_reg( 5); restore_gp_reg( 6);
@ -2275,7 +2275,7 @@ get_sigframe(struct emulated_sigaction *ka, CPUState *regs, size_t frame_size)
unsigned long sp;
/* Default to using normal stack */
sp = regs->gpr[29][regs->current_tc];
sp = regs->gpr[regs->current_tc][29];
/*
* FPU emulator may have it's own trampoline active just
@ -2324,15 +2324,15 @@ static void setup_frame(int sig, struct emulated_sigaction * ka,
* $25 and PC point to the signal handler, $29 points to the
* struct sigframe.
*/
regs->gpr[ 4][regs->current_tc] = sig;
regs->gpr[ 5][regs->current_tc] = 0;
regs->gpr[ 6][regs->current_tc] = frame_addr + offsetof(struct sigframe, sf_sc);
regs->gpr[29][regs->current_tc] = frame_addr;
regs->gpr[31][regs->current_tc] = frame_addr + offsetof(struct sigframe, sf_code);
regs->gpr[regs->current_tc][ 4] = sig;
regs->gpr[regs->current_tc][ 5] = 0;
regs->gpr[regs->current_tc][ 6] = frame_addr + offsetof(struct sigframe, sf_sc);
regs->gpr[regs->current_tc][29] = frame_addr;
regs->gpr[regs->current_tc][31] = frame_addr + offsetof(struct sigframe, sf_code);
/* The original kernel code sets CP0_EPC to the handler
* since it returns to userland using eret
* we cannot do this here, and we must set PC directly */
regs->PC[regs->current_tc] = regs->gpr[25][regs->current_tc] = ka->sa._sa_handler;
regs->PC[regs->current_tc] = regs->gpr[regs->current_tc][25] = ka->sa._sa_handler;
unlock_user_struct(frame, frame_addr, 1);
return;
@ -2353,7 +2353,7 @@ long do_sigreturn(CPUState *regs)
#if defined(DEBUG_SIGNAL)
fprintf(stderr, "do_sigreturn\n");
#endif
frame_addr = regs->gpr[29][regs->current_tc];
frame_addr = regs->gpr[regs->current_tc][29];
if (!lock_user_struct(VERIFY_READ, frame, frame_addr, 1))
goto badframe;

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@ -2752,8 +2752,8 @@ int do_fork(CPUState *env, unsigned int flags, abi_ulong newsp)
/* ??? is this sufficient? */
#elif defined(TARGET_MIPS)
if (!newsp)
newsp = env->gpr[29][env->current_tc];
new_env->gpr[29][env->current_tc] = newsp;
newsp = env->gpr[env->current_tc][29];
new_env->gpr[env->current_tc][29] = newsp;
#elif defined(TARGET_PPC)
if (!newsp)
newsp = env->gpr[1];
@ -3512,7 +3512,7 @@ abi_long do_syscall(void *cpu_env, int num, abi_long arg1,
if (!is_error(ret)) {
#if defined(TARGET_MIPS)
CPUMIPSState *env = (CPUMIPSState*)cpu_env;
env->gpr[3][env->current_tc] = host_pipe[1];
env->gpr[env->current_tc][3] = host_pipe[1];
ret = host_pipe[0];
#else
if (put_user_s32(host_pipe[0], arg1)

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@ -142,7 +142,7 @@ typedef struct mips_def_t mips_def_t;
typedef struct CPUMIPSState CPUMIPSState;
struct CPUMIPSState {
/* General integer registers */
target_ulong gpr[32][MIPS_SHADOW_SET_MAX];
target_ulong gpr[MIPS_SHADOW_SET_MAX][32];
/* Special registers */
target_ulong PC[MIPS_TC_MAX];
#if TARGET_LONG_BITS > HOST_LONG_BITS
@ -150,9 +150,9 @@ struct CPUMIPSState {
target_ulong t1;
target_ulong t2;
#endif
target_ulong HI[MIPS_DSP_ACC][MIPS_TC_MAX];
target_ulong LO[MIPS_DSP_ACC][MIPS_TC_MAX];
target_ulong ACX[MIPS_DSP_ACC][MIPS_TC_MAX];
target_ulong HI[MIPS_TC_MAX][MIPS_DSP_ACC];
target_ulong LO[MIPS_TC_MAX][MIPS_DSP_ACC];
target_ulong ACX[MIPS_TC_MAX][MIPS_DSP_ACC];
target_ulong DSPControl[MIPS_TC_MAX];
CPUMIPSMVPContext *mvp;

View File

@ -255,25 +255,25 @@ void op_dup_T0 (void)
void op_load_HI (void)
{
T0 = env->HI[PARAM1][env->current_tc];
T0 = env->HI[env->current_tc][PARAM1];
FORCE_RET();
}
void op_store_HI (void)
{
env->HI[PARAM1][env->current_tc] = T0;
env->HI[env->current_tc][PARAM1] = T0;
FORCE_RET();
}
void op_load_LO (void)
{
T0 = env->LO[PARAM1][env->current_tc];
T0 = env->LO[env->current_tc][PARAM1];
FORCE_RET();
}
void op_store_LO (void)
{
env->LO[PARAM1][env->current_tc] = T0;
env->LO[env->current_tc][PARAM1] = T0;
FORCE_RET();
}
@ -368,8 +368,8 @@ void op_div (void)
void op_div (void)
{
if (T1 != 0) {
env->LO[0][env->current_tc] = (int32_t)((int64_t)(int32_t)T0 / (int32_t)T1);
env->HI[0][env->current_tc] = (int32_t)((int64_t)(int32_t)T0 % (int32_t)T1);
env->LO[env->current_tc][0] = (int32_t)((int64_t)(int32_t)T0 / (int32_t)T1);
env->HI[env->current_tc][0] = (int32_t)((int64_t)(int32_t)T0 % (int32_t)T1);
}
FORCE_RET();
}
@ -378,8 +378,8 @@ void op_div (void)
void op_divu (void)
{
if (T1 != 0) {
env->LO[0][env->current_tc] = (int32_t)((uint32_t)T0 / (uint32_t)T1);
env->HI[0][env->current_tc] = (int32_t)((uint32_t)T0 % (uint32_t)T1);
env->LO[env->current_tc][0] = (int32_t)((uint32_t)T0 / (uint32_t)T1);
env->HI[env->current_tc][0] = (int32_t)((uint32_t)T0 % (uint32_t)T1);
}
FORCE_RET();
}
@ -447,8 +447,8 @@ void op_ddivu (void)
void op_ddivu (void)
{
if (T1 != 0) {
env->LO[0][env->current_tc] = T0 / T1;
env->HI[0][env->current_tc] = T0 % T1;
env->LO[env->current_tc][0] = T0 / T1;
env->HI[env->current_tc][0] = T0 % T1;
}
FORCE_RET();
}
@ -869,26 +869,26 @@ void op_mulshiu (void)
static always_inline uint64_t get_HILO (void)
{
return ((uint64_t)env->HI[0][env->current_tc] << 32) |
((uint64_t)(uint32_t)env->LO[0][env->current_tc]);
return ((uint64_t)env->HI[env->current_tc][0] << 32) |
((uint64_t)(uint32_t)env->LO[env->current_tc][0]);
}
static always_inline void set_HILO (uint64_t HILO)
{
env->LO[0][env->current_tc] = (int32_t)(HILO & 0xFFFFFFFF);
env->HI[0][env->current_tc] = (int32_t)(HILO >> 32);
env->LO[env->current_tc][0] = (int32_t)(HILO & 0xFFFFFFFF);
env->HI[env->current_tc][0] = (int32_t)(HILO >> 32);
}
static always_inline void set_HIT0_LO (uint64_t HILO)
{
env->LO[0][env->current_tc] = (int32_t)(HILO & 0xFFFFFFFF);
T0 = env->HI[0][env->current_tc] = (int32_t)(HILO >> 32);
env->LO[env->current_tc][0] = (int32_t)(HILO & 0xFFFFFFFF);
T0 = env->HI[env->current_tc][0] = (int32_t)(HILO >> 32);
}
static always_inline void set_HI_LOT0 (uint64_t HILO)
{
T0 = env->LO[0][env->current_tc] = (int32_t)(HILO & 0xFFFFFFFF);
env->HI[0][env->current_tc] = (int32_t)(HILO >> 32);
T0 = env->LO[env->current_tc][0] = (int32_t)(HILO & 0xFFFFFFFF);
env->HI[env->current_tc][0] = (int32_t)(HILO >> 32);
}
void op_mult (void)
@ -1029,13 +1029,13 @@ void op_mulshiu (void)
#if defined(TARGET_MIPS64)
void op_dmult (void)
{
CALL_FROM_TB4(muls64, &(env->LO[0][env->current_tc]), &(env->HI[0][env->current_tc]), T0, T1);
CALL_FROM_TB4(muls64, &(env->LO[env->current_tc][0]), &(env->HI[env->current_tc][0]), T0, T1);
FORCE_RET();
}
void op_dmultu (void)
{
CALL_FROM_TB4(mulu64, &(env->LO[0][env->current_tc]), &(env->HI[0][env->current_tc]), T0, T1);
CALL_FROM_TB4(mulu64, &(env->LO[env->current_tc][0]), &(env->HI[env->current_tc][0]), T0, T1);
FORCE_RET();
}
#endif
@ -1044,14 +1044,14 @@ void op_dmultu (void)
void op_movn (void)
{
if (T1 != 0)
env->gpr[PARAM1][env->current_tc] = T0;
env->gpr[env->current_tc][PARAM1] = T0;
FORCE_RET();
}
void op_movz (void)
{
if (T1 == 0)
env->gpr[PARAM1][env->current_tc] = T0;
env->gpr[env->current_tc][PARAM1] = T0;
FORCE_RET();
}

View File

@ -163,25 +163,25 @@ void do_dclz (void)
#if TARGET_LONG_BITS > HOST_LONG_BITS
static always_inline uint64_t get_HILO (void)
{
return (env->HI[0][env->current_tc] << 32) | (uint32_t)env->LO[0][env->current_tc];
return (env->HI[env->current_tc][0] << 32) | (uint32_t)env->LO[env->current_tc][0];
}
static always_inline void set_HILO (uint64_t HILO)
{
env->LO[0][env->current_tc] = (int32_t)HILO;
env->HI[0][env->current_tc] = (int32_t)(HILO >> 32);
env->LO[env->current_tc][0] = (int32_t)HILO;
env->HI[env->current_tc][0] = (int32_t)(HILO >> 32);
}
static always_inline void set_HIT0_LO (uint64_t HILO)
{
env->LO[0][env->current_tc] = (int32_t)(HILO & 0xFFFFFFFF);
T0 = env->HI[0][env->current_tc] = (int32_t)(HILO >> 32);
env->LO[env->current_tc][0] = (int32_t)(HILO & 0xFFFFFFFF);
T0 = env->HI[env->current_tc][0] = (int32_t)(HILO >> 32);
}
static always_inline void set_HI_LOT0 (uint64_t HILO)
{
T0 = env->LO[0][env->current_tc] = (int32_t)(HILO & 0xFFFFFFFF);
env->HI[0][env->current_tc] = (int32_t)(HILO >> 32);
T0 = env->LO[env->current_tc][0] = (int32_t)(HILO & 0xFFFFFFFF);
env->HI[env->current_tc][0] = (int32_t)(HILO >> 32);
}
void do_mult (void)
@ -303,8 +303,8 @@ void do_div (void)
{
/* 64bit datatypes because we may see overflow/underflow. */
if (T1 != 0) {
env->LO[0][env->current_tc] = (int32_t)((int64_t)(int32_t)T0 / (int32_t)T1);
env->HI[0][env->current_tc] = (int32_t)((int64_t)(int32_t)T0 % (int32_t)T1);
env->LO[env->current_tc][0] = (int32_t)((int64_t)(int32_t)T0 / (int32_t)T1);
env->HI[env->current_tc][0] = (int32_t)((int64_t)(int32_t)T0 % (int32_t)T1);
}
}
#endif
@ -316,12 +316,12 @@ void do_ddiv (void)
int64_t arg0 = (int64_t)T0;
int64_t arg1 = (int64_t)T1;
if (arg0 == ((int64_t)-1 << 63) && arg1 == (int64_t)-1) {
env->LO[0][env->current_tc] = arg0;
env->HI[0][env->current_tc] = 0;
env->LO[env->current_tc][0] = arg0;
env->HI[env->current_tc][0] = 0;
} else {
lldiv_t res = lldiv(arg0, arg1);
env->LO[0][env->current_tc] = res.quot;
env->HI[0][env->current_tc] = res.rem;
env->LO[env->current_tc][0] = res.quot;
env->HI[env->current_tc][0] = res.rem;
}
}
}
@ -330,8 +330,8 @@ void do_ddiv (void)
void do_ddivu (void)
{
if (T1 != 0) {
env->LO[0][env->current_tc] = T0 / T1;
env->HI[0][env->current_tc] = T0 % T1;
env->LO[env->current_tc][0] = T0 / T1;
env->HI[env->current_tc][0] = T0 % T1;
}
}
#endif
@ -627,21 +627,21 @@ void do_pmon (int function)
function /= 2;
switch (function) {
case 2: /* TODO: char inbyte(int waitflag); */
if (env->gpr[4][env->current_tc] == 0)
env->gpr[2][env->current_tc] = -1;
if (env->gpr[env->current_tc][4] == 0)
env->gpr[env->current_tc][2] = -1;
/* Fall through */
case 11: /* TODO: char inbyte (void); */
env->gpr[2][env->current_tc] = -1;
env->gpr[env->current_tc][2] = -1;
break;
case 3:
case 12:
printf("%c", (char)(env->gpr[4][env->current_tc] & 0xFF));
printf("%c", (char)(env->gpr[env->current_tc][4] & 0xFF));
break;
case 17:
break;
case 158:
{
unsigned char *fmt = (void *)(unsigned long)env->gpr[4][env->current_tc];
unsigned char *fmt = (void *)(unsigned long)env->gpr[env->current_tc][4];
printf("%s", fmt);
}
break;

View File

@ -21,31 +21,31 @@
#if defined(REG)
void glue(op_load_gpr_T0_gpr, REG) (void)
{
T0 = env->gpr[REG][env->current_tc];
T0 = env->gpr[env->current_tc][REG];
FORCE_RET();
}
void glue(op_store_T0_gpr_gpr, REG) (void)
{
env->gpr[REG][env->current_tc] = T0;
env->gpr[env->current_tc][REG] = T0;
FORCE_RET();
}
void glue(op_load_gpr_T1_gpr, REG) (void)
{
T1 = env->gpr[REG][env->current_tc];
T1 = env->gpr[env->current_tc][REG];
FORCE_RET();
}
void glue(op_store_T1_gpr_gpr, REG) (void)
{
env->gpr[REG][env->current_tc] = T1;
env->gpr[env->current_tc][REG] = T1;
FORCE_RET();
}
void glue(op_load_gpr_T2_gpr, REG) (void)
{
T2 = env->gpr[REG][env->current_tc];
T2 = env->gpr[env->current_tc][REG];
FORCE_RET();
}

View File

@ -6811,7 +6811,7 @@ void dump_fpu (CPUState *env)
{
if (loglevel) {
fprintf(logfile, "pc=0x" TARGET_FMT_lx " HI=0x" TARGET_FMT_lx " LO=0x" TARGET_FMT_lx " ds %04x " TARGET_FMT_lx " %d\n",
env->PC[env->current_tc], env->HI[0][env->current_tc], env->LO[0][env->current_tc], env->hflags, env->btarget, env->bcond);
env->PC[env->current_tc], env->HI[env->current_tc][0], env->LO[env->current_tc][0], env->hflags, env->btarget, env->bcond);
fpu_dump_state(env, logfile, fprintf, 0);
}
}
@ -6830,16 +6830,16 @@ void cpu_mips_check_sign_extensions (CPUState *env, FILE *f,
if (!SIGN_EXT_P(env->PC[env->current_tc]))
cpu_fprintf(f, "BROKEN: pc=0x" TARGET_FMT_lx "\n", env->PC[env->current_tc]);
if (!SIGN_EXT_P(env->HI[0][env->current_tc]))
cpu_fprintf(f, "BROKEN: HI=0x" TARGET_FMT_lx "\n", env->HI[0][env->current_tc]);
if (!SIGN_EXT_P(env->LO[0][env->current_tc]))
cpu_fprintf(f, "BROKEN: LO=0x" TARGET_FMT_lx "\n", env->LO[0][env->current_tc]);
if (!SIGN_EXT_P(env->HI[env->current_tc][0]))
cpu_fprintf(f, "BROKEN: HI=0x" TARGET_FMT_lx "\n", env->HI[env->current_tc][0]);
if (!SIGN_EXT_P(env->LO[env->current_tc][0]))
cpu_fprintf(f, "BROKEN: LO=0x" TARGET_FMT_lx "\n", env->LO[env->current_tc][0]);
if (!SIGN_EXT_P(env->btarget))
cpu_fprintf(f, "BROKEN: btarget=0x" TARGET_FMT_lx "\n", env->btarget);
for (i = 0; i < 32; i++) {
if (!SIGN_EXT_P(env->gpr[i][env->current_tc]))
cpu_fprintf(f, "BROKEN: %s=0x" TARGET_FMT_lx "\n", regnames[i], env->gpr[i][env->current_tc]);
if (!SIGN_EXT_P(env->gpr[env->current_tc][i]))
cpu_fprintf(f, "BROKEN: %s=0x" TARGET_FMT_lx "\n", regnames[i], env->gpr[env->current_tc][i]);
}
if (!SIGN_EXT_P(env->CP0_EPC))
@ -6860,7 +6860,7 @@ void cpu_dump_state (CPUState *env, FILE *f,
for (i = 0; i < 32; i++) {
if ((i & 3) == 0)
cpu_fprintf(f, "GPR%02d:", i);
cpu_fprintf(f, " %s " TARGET_FMT_lx, regnames[i], env->gpr[i][env->current_tc]);
cpu_fprintf(f, " %s " TARGET_FMT_lx, regnames[i], env->gpr[env->current_tc][i]);
if ((i & 3) == 3)
cpu_fprintf(f, "\n");
}