Sylvain Munaut
0297cd029b
fw/tuner_e4k: Experimental new init sequence
...
More complete ... Tries to bring up the e4k to a usable
state all at once.
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-04-01 21:59:18 +02:00
Sylvain Munaut
b2b5d6518b
fw/tuner_e4k: Add some more magic init
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It comes from the kernel driver. No idea what it does really ...
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-04-01 21:37:29 +02:00
Sylvain Munaut
29f13b5c18
fw/sdr-test: Add command for direct e4k register manipulation R/W
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Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-04-01 21:36:37 +02:00
Sylvain Munaut
b0baaab491
uart_cmd: Add support for read commands with arguments
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The syntax is really not obvious, but at least the implementation
is simple ...
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-04-01 21:36:12 +02:00
Sylvain Munaut
1ba8c169ee
fw/tuner_e4k: Add function to enable/disable the IF channel filter
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Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-04-01 21:35:32 +02:00
Sylvain Munaut
16202796ae
fw/tuner_e4k: Disable auto gain adjustement during DC table gen
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We need them to be fixed during that time, so disable all auto
stuff
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-04-01 21:34:25 +02:00
Sylvain Munaut
161ad3c469
fw/tuner_e4k: Avoid dual read of DC4 when generating DC table
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Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-04-01 21:33:25 +02:00
Sylvain Munaut
24c3a9a196
fw/tuner_e4k: DC offset table gen doc fixes
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No we don't need to wait. I checked if the value ever changed after
the first read and it doesn't. Other e4k drivers don't wait either.
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-04-01 21:32:24 +02:00
Sylvain Munaut
5442a0dbe1
fw/tuner_e4k: Use signed int for if1_gain in the gain combination array
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Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-04-01 16:19:07 +02:00
Sylvain Munaut
d2f56043ef
fw/tuner_e4k: Mixer gain is 4 or 12 dB, not 0/12
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Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-04-01 16:18:27 +02:00
Sylvain Munaut
eeaa36a1fb
fw/tuner_e4k: Fix the array_size of the filter fw settings.
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This was causing the array length to be '1' and so we always
took the first possible setting (the widest) ...
Certainly not good when you only have a 500 kHz sample rate.
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-03-31 23:28:31 +02:00
Sylvain Munaut
975c9813e9
tuner_e4k: Properly set the band
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Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-03-29 23:37:00 +02:00
Sylvain Munaut
bdb4f8e5ca
tuner_e4k: Fix band setting method mask & calls
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Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-03-29 23:36:09 +02:00
Sylvain Munaut
60d88b6ed2
tuner_e4k: Fix closest_arr_idx
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The previous method tried to do clever stuff assuming the sequence is
sorted. Unfortunately:
1) this didn't really find the 'closest' match
2) this didn't work for the first or last interval
3) this didn't work for freq slightly above or below the last/first freq
All in all, it's easier to try them all.
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-03-29 23:35:36 +02:00
Sylvain Munaut
a95b61f397
sdr-test: Add a 'dfu' serial command to enter DFU mode
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Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-03-29 10:39:28 +02:00
Sylvain Munaut
311885441c
tuner_e4k: Fix reference to 65535 vs 65536
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Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-03-29 08:47:51 +02:00
Sylvain Munaut
585c6d378a
tuner_e4k: Max VCO frequency is 3.9GHz not 3.6GHz
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Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2012-03-29 08:46:48 +02:00
Christian Daniel
4683c1c21a
tuner_e4k: add manual i/q correction
2012-03-06 15:29:33 +01:00
Christian Daniel
463a3f9c28
tuner_e4k: add setting for common mode
2012-03-06 14:43:03 +01:00
Harald Welte
6d95768e9c
fast_source: Add FPGA_TEST_STATS #define for FPGA/SSC verification
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Using fpga.test_mode=1 this code can compute statistics on the
incrementing-counter-with-every-sample behaviour.
2012-03-06 12:26:33 +01:00
Harald Welte
66235f593e
SSC: use rising edge of RF (Rx Frame), not falling
2012-03-06 12:15:55 +01:00
Harald Welte
3745d083f6
SSC: Inclode Overrun in statistics
2012-03-06 10:48:33 +01:00
Harald Welte
31d11c2bf8
tuner_e4k: fix the Y value to b e 65536, not 65535
2012-03-05 23:31:33 +01:00
Harald Welte
bab0eb62ce
tuner_e4k: Introduce #define for OUT_OF_SPEC operation
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The device can be used from 50..1900 MHz and not only 64..1700
2012-03-05 23:29:48 +01:00
Harald Welte
ef60309e63
osdr_fpga: Add support for enabling test (counter) mode
2012-03-05 23:20:18 +01:00
Harald Welte
bd2b9a9697
main: add dc offset calibration commands
2012-03-05 18:37:44 +01:00
Harald Welte
9ce29d79e8
e4k: fix unresolved symbols in dc offset calibration
2012-03-05 18:37:18 +01:00
Harald Welte
c4c7c6add5
e4k: add dc offset calibration code
2012-03-05 18:25:11 +01:00
Harald Welte
5a23c52120
fast_source: We switch the LED based on the streaming IN interface, not OUT
2012-03-05 17:03:09 +01:00
Harald Welte
b6697b17fc
fast_source: implement get/set of mute feature
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this avoids unneccessary stalls on EP0
2012-02-29 11:52:21 +01:00
Harald Welte
cc42e4df36
e4k: initialize tuner with smalles filters possible
2012-02-29 02:45:06 +01:00
Harald Welte
be7d17091d
uart_cmd: make sure 'set' type commands are visible on the console
2012-02-29 02:31:02 +01:00
Harald Welte
8c63475355
fix erroneous printing of command failure
2012-02-29 02:30:34 +01:00
Harald Welte
f49513d482
tuner gain is not gettable
2012-02-29 02:15:40 +01:00
Harald Welte
67877f1692
improve commandline readability (prompt) and more tuner commands
2012-02-29 02:11:06 +01:00
Harald Welte
c8ac848695
increase command buffers from 16 to 32 bytes
2012-02-29 02:10:36 +01:00
Harald Welte
00123abb2d
move SSC commands to osdr_ssc.c
2012-02-29 01:57:39 +01:00
Harald Welte
2a2c03a7b9
fpga related register/field dumping code (abstract)
2012-02-29 01:49:20 +01:00
Harald Welte
0297414977
sdr-test: make sure to automatically start SSC+DMA when USB ISO EP opens
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this automatically starts to send samples at the time the usb audio
source on the host PC is opened.
2012-02-29 00:31:17 +01:00
Harald Welte
d7cc695022
fast_source: export the currently selected interface altsettings
2012-02-29 00:30:01 +01:00
Harald Welte
66a2e2bbe3
SSC: add ssc_active() function to determine if SSC is active
2012-02-29 00:29:37 +01:00
Harald Welte
8f2ba81efa
dead code removal
2012-02-29 00:05:19 +01:00
Harald Welte
8930b8a3ab
fix tuner.init, add tuner.gain
2012-02-28 22:33:58 +01:00
Harald Welte
5a389db1c1
uart_cmd: introduce argument array parsing
2012-02-28 22:21:09 +01:00
Harald Welte
5bf0e748d8
add explicit comnand to get ssc stats
2012-02-28 22:02:16 +01:00
Harald Welte
c4166bf874
introduce new uart command layer for controlling the firmware
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You can now issue commands like
execute a command:
fpga.dump!
set a value:
tuner.freq=100000000
get a value:
tuner.freq?
2012-02-28 21:33:07 +01:00
Harald Welte
741335fe32
logging: fix CR at end of log line
2012-02-28 21:32:53 +01:00
Harald Welte
41f8d83364
add simple command parser to be used from the UART
2012-02-28 21:29:08 +01:00
Harald Welte
e81bf0ed6f
add code for SSC DMA and USB fast audio source
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This version is able to acutually DMA data from SSC via USB audio into
the PC.
2012-02-28 03:11:29 +01:00
Harald Welte
20656119c0
Fix SSC bit-ordering and sync polarity, DMAC IRQ and remove MEM2MEM
2012-02-26 23:15:52 +01:00