tuner_e4k: add manual i/q correction
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7abdbca85c
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4683c1c21a
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@ -207,6 +207,8 @@ int sam3u_e4k_init(struct e4k_state *e4k, void *i2c, uint8_t slave_addr);
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void sam3u_e4k_power(struct e4k_state *e4k, int on);
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void sam3u_e4k_stby(struct e4k_state *e4k, int on);
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int e4k_manual_dc_offset(struct e4k_state *e4k, int8_t iofs, int8_t irange, int8_t qofs, int8_t qrange);
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int e4k_dc_offset_calibrate(struct e4k_state *e4k);
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int e4k_dc_offset_gen_table(struct e4k_state *e4k);
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@ -313,6 +313,27 @@ static int cmd_tuner_commonmode(struct cmd_state *cs, enum cmd_op op,
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return 0;
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}
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static int cmd_tuner_iqofs(struct cmd_state *cs, enum cmd_op op,
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const char *cmd, int argc, char ** argv)
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{
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int iofs;
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int qofs;
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int irange;
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int qrange;
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if(op != CMD_OP_SET)
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return -EINVAL;
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if(argc < 4)
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return -EINVAL;
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iofs = strtol(argv[0], NULL, 10);
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qofs = strtol(argv[1], NULL, 10);
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irange = strtol(argv[2], NULL, 10);
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qrange = strtol(argv[3], NULL, 10);
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return e4k_manual_dc_offset(&e4k, iofs, irange, qofs, qrange);
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}
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static struct cmd cmds[] = {
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{ "tuner.init", CMD_OP_EXEC, cmd_tuner_init,
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"Initialize the tuner" },
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@ -332,6 +353,8 @@ static struct cmd cmds[] = {
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"Generate DC offset table" },
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{ "tuner.commonmode", CMD_OP_SET, cmd_tuner_commonmode,
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"Switch common mode voltage" },
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{ "tuner.iqofs", CMD_OP_SET, cmd_tuner_iqofs,
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"Manually set I/Q offset and correction range" },
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{ "si570.freq", CMD_OP_SET|CMD_OP_GET, cmd_si570_freq,
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"Change the SI570 clock frequency" },
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@ -727,6 +727,31 @@ int e4k_commonmode_set(struct e4k_state *e4k, int8_t value)
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/***********************************************************************
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* DC Offset */
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int e4k_manual_dc_offset(struct e4k_state *e4k, int8_t iofs, int8_t irange, int8_t qofs, int8_t qrange)
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{
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int res;
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if((iofs < 0x00) || (iofs > 0x3f))
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return -EINVAL;
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if((irange < 0x00) || (irange > 0x03))
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return -EINVAL;
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if((qofs < 0x00) || (qofs > 0x3f))
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return -EINVAL;
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if((qrange < 0x00) || (qrange > 0x03))
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return -EINVAL;
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res = e4k_reg_set_mask(e4k, E4K_REG_DC2, 0x3f, iofs);
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if(res < 0)
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return res;
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res = e4k_reg_set_mask(e4k, E4K_REG_DC3, 0x3f, qofs);
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if(res < 0)
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return res;
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res = e4k_reg_set_mask(e4k, E4K_REG_DC4, 0x33, (qrange << 4) | irange);
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return res;
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}
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/*! \brief Perform a DC offset calibration right now
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* \param[e4k] handle to the tuner chip
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*/
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