mirror of https://gerrit.osmocom.org/libusrp
fa46b23ddb
* master: (39 commits) Add gru.hexshort to deal with short hex constants Assign USB PID for Hans de Bok Add missing buffer allocator hint to gr_ofdm_sampler.cc Really fix the missing include for boost::bind gr-wxgui: Added additional color table entries Missed updates for omnithread/mblock removal Remove omnithreads library. Remove mblock library. We hardly knew 'ye. Convert gr-audio-portaudio to Boost via gruel Further updates for removing omnithreads Update build configuration for OSX omnithreads changeover Add missing include file for boost::bind Convert gcell to use boost::threads instead of omnithread. Fix sequence error indication after stopping then restarting streaming on USRP2. initial move from mld_threads to gruel:: namespace threads and such Initial changes to remove mld_thread and instead use gruel:: namespace classes Fixing doxygen warnings from arb_resampler. Also, removed set_taps from public Fixing doxygen warnings from channelizer block. Fixing documentation to get rid of doxygen warnings. Adding documentation for fff version of othe PFB clock sync algorithm. ... |
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doc | ||
firmware | ||
fpga | ||
host | ||
.gitignore | ||
Makefile.am | ||
README | ||
usrp.inf | ||
usrp.iss.in | ||
usrp.pc.in |
README
# # README -- the short version # The top level makefile handles the host code and FX2 firmware. Besides the normal gcc suite and all the auto tools, you'll need the SDCC free C compiler to build the firmware. You MUST USE VERSION 2.4.0 or VERSION 2.5.0 due to some problems with variable initialization. http://sdcc.sourceforge.net The high level interface to the USRP using our standard FPGA bitstram is contained in usrp/host/lib/usrp_standard.h If you've got doxygen installed, there are html docs in usrp/doc/html/index.html # Compiling the verilog (not required unless you're modifying it) If you want to build the FPGA .rbf file from source (not required; we provide pre-compiled .rbf files in usrp/fpga/rbf directory), you'll need Altera's no cost Quartus II development tools. We're currently building with Quartus II 5.1sp1 Web Edition. The project file is usrp/fpga/toplevel/usrp_std/usrp_std.qpf. The toplevel verilog file is usrp/fpga/toplevel/usrp_std/usrp_std.v. The bulk of the verilog modules are contained in usrp/fpga/sdr_lib