mirror of https://gerrit.osmocom.org/libusrp
123 lines
2.4 KiB
C
123 lines
2.4 KiB
C
/* -*- c++ -*- */
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/*
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* Copyright 2004 Free Software Foundation, Inc.
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*
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* This file is part of GNU Radio
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*
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* GNU Radio is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 3, or (at your option)
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* any later version.
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*
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* GNU Radio is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with GNU Radio; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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*/
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#include "fpga.h"
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#include "fpga_regs_common.h"
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#include "usrp_common.h"
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#include "usrp_globals.h"
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#include "spi.h"
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unsigned char g_tx_reset = 0;
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unsigned char g_rx_reset = 0;
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void
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fpga_write_reg (unsigned char regno, const __xdata unsigned char *regval)
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{
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spi_write (0, 0x00 | (regno & 0x7f),
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SPI_ENABLE_FPGA,
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SPI_FMT_MSB | SPI_FMT_HDR_1,
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regval, 4);
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}
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static __xdata unsigned char regval[4] = {0, 0, 0, 0};
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static void
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write_fpga_master_ctrl (void)
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{
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unsigned char v = 0;
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if (g_tx_enable)
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v |= bmFR_MC_ENABLE_TX;
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if (g_rx_enable)
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v |= bmFR_MC_ENABLE_RX;
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if (g_tx_reset)
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v |= bmFR_MC_RESET_TX;
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if (g_rx_reset)
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v |= bmFR_MC_RESET_RX;
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regval[3] = v;
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fpga_write_reg (FR_MASTER_CTRL, regval);
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}
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// Resets both AD9862's and the FPGA serial bus interface.
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void
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fpga_set_reset (unsigned char on)
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{
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on &= 0x1;
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if (on){
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USRP_PC &= ~bmPC_nRESET; // active low
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g_tx_enable = 0;
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g_rx_enable = 0;
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g_tx_reset = 0;
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g_rx_reset = 0;
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}
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else
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USRP_PC |= bmPC_nRESET;
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}
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void
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fpga_set_tx_enable (unsigned char on)
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{
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on &= 0x1;
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g_tx_enable = on;
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write_fpga_master_ctrl ();
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if (on){
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g_tx_underrun = 0;
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fpga_clear_flags ();
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}
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}
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void
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fpga_set_rx_enable (unsigned char on)
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{
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on &= 0x1;
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g_rx_enable = on;
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write_fpga_master_ctrl ();
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if (on){
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g_rx_overrun = 0;
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fpga_clear_flags ();
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}
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}
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void
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fpga_set_tx_reset (unsigned char on)
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{
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on &= 0x1;
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g_tx_reset = on;
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write_fpga_master_ctrl ();
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}
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void
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fpga_set_rx_reset (unsigned char on)
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{
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on &= 0x1;
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g_rx_reset = on;
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write_fpga_master_ctrl ();
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}
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