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libusrp
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9 Commits
3.4.7 ... master

Author SHA1 Message Date
Oliver Smith 0f8f5deed4 contrib: remove rpm spec file 
Related: https://osmocom.org/news/255
Related: OS#6446
Change-Id: Ia10ffce57cf0c067d370f0f381435cdd439e3dd9
 2024-05-08 15:26:55 +02:00
Pau Espin 44c212e3dc Bump version: 3.4.7.7-5730 → 3.4.8 
Change-Id: I0b8e5a5a62a229b60b0133541efbaad616093a23
 2023-09-12 12:28:52 +02:00
Pau Espin 573075bfed Fix compilation with newer sdcc 
Since recent system upgrade which pulled in sdcc 4.3.0, build fails with
following error:
/git/libusrp/firmware/include/fx2regs.h:324: syntax error: token -> '+' ; column 26

It seems newer sdcc doesn't like having sums directly in there. Using
parenthesis around the expression fixes the problem.

Related: OS#6157
Change-Id: Iccc0b1ffe95971957f16008c3e3b873d065ba0ea
 2023-08-29 14:02:56 +02:00
Pau Espin d1d39c65a3 cosmetic: fx2regs.h: Fix trailing whitespace 
Change-Id: Ie9e14cfb70168d0ff2bcdfb2695d3cb0f77cd5db
 2023-08-29 14:02:56 +02:00
Pau Espin 8f6929276e linter: Don't check header files 
None of those follow osmocom coding style.

Change-Id: I2276ca7aa2b246447aeebcaa5a8cb3049147c3c9
 2023-08-29 14:02:50 +02:00
Oliver Smith 312f964ed2 debian/rules: don't build in parallel 
With upgrading the debhelper compat level to v10, parallel building was
enabled by default. But this doesn't work reliably with libusrp, so
disable it. On OBS, out of 18 builds, two failed.

Related: OS#3970
Change-Id: Ic23778320a44ec6ee2fef499216eb8a0c52603d2
 2023-04-28 10:55:52 +02:00
Oliver Smith f75863f235 Cosmetic: contrib/jenkins.sh: fix typo 
Change-Id: Ic0459bd5585fbcf3af785dfda167811a07107edb
 2023-04-28 10:50:07 +02:00
Oliver Smith 64dd85f770 debian: set compat level to 10 
Related: OS#5958
Change-Id: If42ed8736658d23c99fdd8cbbe511819b1568cbe
 2023-04-25 16:48:19 +02:00
Oliver Smith fe31e2b363 configure: abort if SDCC is not found 
Change RESULT to ERROR so the configure script stops when SDCC is not
found. Otherwise it tries to use "no":

  no -I../../firmware/include  -c delay.c -o delay.rel
  /bin/bash: line 1: no: command not found

Change-Id: Id8defcc72a35e469a1eeb59919d66cc7cf2f6ac8
 2023-02-09 17:19:31 +01:00
11 changed files with 122 additions and 224 deletions
Show Stats Expand all files Collapse all files

1
.checkpatch.conf Normal file
View File

@ -0,0 +1 @@
--exclude .*h

2
Makefile.am
View File

@ -29,7 +29,7 @@ EXTRA_DIST += \
usrp.inf \
.version \
debian \
contrib/libusrp.spec.in
$(NULL)
SUBDIRS = host fpga doc firmware

4
configure.ac
View File

@ -83,7 +83,7 @@ AM_CONDITIONAL(HAVE_DOXYGEN, test $DOXYGEN != false && test "x$doxygen" = "xyes"
AC_CHECK_PROG([XMLTO],[xmlto],[yes],[])
AM_CONDITIONAL([HAS_XMLTO], [test x$XMLTO = xyes])
USRP_SDCC([3.2.0],[],[passed=no;AC_MSG_RESULT([Unable to find firmware compiler SDCC 3.x.])])
USRP_SDCC([3.2.0],[],[passed=no;AC_MSG_ERROR([Unable to find firmware compiler SDCC 3.x.])])
AC_CONFIG_FILES([
Makefile
@ -112,4 +112,4 @@ AC_CONFIG_FILES([
fpga/rbf/rev2/Makefile
fpga/rbf/rev4/Makefile
])
AC_OUTPUT([contrib/libusrp.spec])
AC_OUTPUT

2
contrib/jenkins.sh
View File

@ -4,6 +4,6 @@ set -ex
autoreconf --install --force
./configure
$MAKE # Parallel make fails ocsasionally, see OS#3970.
$MAKE # Parallel make fails occasionally, see OS#3970.
$MAKE distcheck
$MAKE maintainer-clean

119
contrib/libusrp.spec.in
View File

@ -1,119 +0,0 @@
#
# spec file for package libusrp
#
# Copyright (c) 2019 SUSE LINUX GmbH, Nuernberg, Germany.
# Copyright (c) 2018, Martin Hauke <mardnh@gmx.de>
#
# All modifications and additions to the file contributed by third parties
# remain the property of their copyright owners, unless otherwise agreed
# upon. The license for this file, and modifications and additions to the
# file, is the same license as for the pristine package itself (unless the
# license for the pristine package is not an Open Source License, in which
# case the license is the MIT License). An "Open Source License" is a
# license that conforms to the Open Source Definition (Version 1.9)
# published by the Open Source Initiative.
%define libname libusrp1
Name: libusrp
Version: @VERSION@
Release: 0
Summary: Stand-alone libusrp for USRP1 from old gnuradio.git
License: GPL-3.0-or-later
Group: Development/Libraries/C and C++
URL: https://git.osmocom.org/libusrp
Source: %{name}-%{version}.tar.xz
BuildRequires: autoconf
BuildRequires: automake
BuildRequires: fdupes
BuildRequires: gcc-c++
BuildRequires: libtool
BuildRequires: pkgconfig
BuildRequires: sdcc
BuildRequires: python3
BuildRequires: pkgconfig(libusb-1.0)
%if 0%{?suse_version} > 1325
BuildRequires: libboost_date_time-devel
BuildRequires: libboost_filesystem-devel
BuildRequires: libboost_program_options-devel
BuildRequires: libboost_system-devel
BuildRequires: libboost_thread-devel
%else
BuildRequires: boost-devel
%endif
%description
Stand-alone libusrp for USRP1 from old gnuradio.git.
%package -n %{libname}
Summary: Stand-alone libusrp for USRP1 from old gnuradio.git
Group: System/Libraries
%description -n %{libname}
Stand-alone libusrp for USRP1 from old gnuradio.git.
%package devel
Summary: Development files for libusrp
Group: Development/Libraries/C and C++
Requires: %{libname} = %{version}
%description devel
Stand-alone libusrp for USRP1 from old gnuradio.git.
This subpackage contains libraries and header files for developing
applications that want to make use of libusrp.
%package -n usrp-tools
Summary: Tools for the URSP1 SDR
Group: Hardware/Other
%description -n usrp-tools
Tools for the URSP1 SDR.
%package -n usrp-firmware
Summary: Firmware files for the URSP1 SDR
Group: Hardware/Other
Requires: usrp-tools = %{version}
BuildArch: noarch
%description -n usrp-firmware
Firmware files for the USRP1 SDR.
%prep
%setup -q
%build
echo "%{version}" >.tarball-version
autoreconf -fiv
%configure
# parallel build is br0ken
# -> https://osmocom.org/issues/3970#change-15556
make V=1 # %{?_smp_mflags}
%install
%make_install
rm -f %{buildroot}%{_libdir}/libusrp.la
# FIXME: gnuradio swig stuff shouldn't be there
rm -rf %{buildroot}%{_includedir}/gnuradio/
%fdupes %{buildroot}%{_datadir}/usrp
%post -n %{libname} -p /sbin/ldconfig
%postun -n %{libname} -p /sbin/ldconfig
%files -n usrp-tools
%{_bindir}/usrp_cal_dc_offset
%{_bindir}/usrper
%files -n %{libname}
%{_libdir}/libusrp*.so.*
%files -n usrp-firmware
%dir %{_datadir}/usrp
%{_datadir}/usrp/rev2
%{_datadir}/usrp/rev4
%files devel
%{_includedir}/usrp
%{_libdir}/libusrp.so
%{_libdir}/pkgconfig/usrp.pc
%changelog

15
debian/changelog vendored
View File

@ -1,3 +1,18 @@
libusrp (3.4.8) unstable; urgency=medium
[ Oliver Smith ]
* configure: abort if SDCC is not found
* debian: set compat level to 10
* Cosmetic: contrib/jenkins.sh: fix typo
* debian/rules: don't build in parallel
[ Pau Espin Pedrol ]
* linter: Don't check header files
* cosmetic: fx2regs.h: Fix trailing whitespace
* Fix compilation with newer sdcc
-- Pau Espin Pedrol <pespin@sysmocom.de> Tue, 12 Sep 2023 12:28:51 +0200
libusrp (3.4.7) unstable; urgency=medium
[ Oliver Smith ]

2
debian/compat vendored
View File

@ -1 +1 @@
9
10

4
debian/control vendored
View File

@ -1,7 +1,7 @@
Source: libusrp
Priority: optional
Maintainer: Pau Espin Pedrol <pespin@sysmocom.de>
Build-Depends: debhelper (>=9),
Maintainer: Osmocom team <openbsc@lists.osmocom.org>
Build-Depends: debhelper (>= 10),
dh-autoreconf,
autotools-dev,
autoconf,

3
debian/rules vendored
View File

@ -9,8 +9,9 @@ export DEB_BUILD_MAINT_OPTIONS = hardening=+all
#export DH_VERBOSE=1
# --no-parallel: OS#3970
%:
dh $@ --with autoreconf --fail-missing
dh $@ --with autoreconf --fail-missing --no-parallel
override_dh_auto_configure:
dh_auto_configure -- --enable-doxygen

184
firmware/include/fx2regs.h
View File

@ -1,19 +1,19 @@
/* -*- c++ -*- */
/*
* Copyright 2003 Free Software Foundation, Inc.
*
*
* This file is part of GNU Radio
*
*
* GNU Radio is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 3, or (at your option)
* any later version.
*
*
* GNU Radio is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*
* You should have received a copy of the GNU General Public License
* along with GNU Radio; see the file COPYING. If not, write to
* the Free Software Foundation, Inc., 51 Franklin Street,
@ -45,18 +45,18 @@
// FX2 Related Register Assignments
//-----------------------------------------------------------------------------
// The Ez-USB FX2 registers are defined here. We use FX2regs.h for register
// address allocation by using "#define ALLOCATE_EXTERN".
// When using "#define ALLOCATE_EXTERN", you get (for instance):
// The Ez-USB FX2 registers are defined here. We use FX2regs.h for register
// address allocation by using "#define ALLOCATE_EXTERN".
// When using "#define ALLOCATE_EXTERN", you get (for instance):
// __xdata volatile BYTE OUT7BUF[64] _at_ 0x7B40;
// Such lines are created from FX2.h by using the preprocessor.
// Incidently, these lines will not generate any space in the resulting hex
// file; they just bind the symbols to the addresses for compilation.
// You just need to put "#define ALLOCATE_EXTERN" in your main program file;
// i.e. fw.c or a stand-alone C source file.
// Without "#define ALLOCATE_EXTERN", you just get the external reference:
// Such lines are created from FX2.h by using the preprocessor.
// Incidently, these lines will not generate any space in the resulting hex
// file; they just bind the symbols to the addresses for compilation.
// You just need to put "#define ALLOCATE_EXTERN" in your main program file;
// i.e. fw.c or a stand-alone C source file.
// Without "#define ALLOCATE_EXTERN", you just get the external reference:
// extern __xdata volatile BYTE OUT7BUF[64] ;// 0x7B40;
// This uses the concatenation operator "##" to insert a comment "//"
// This uses the concatenation operator "##" to insert a comment "//"
// to cut off the end of the line, "_at_ 0x7B40;", which is not wanted.
*/
@ -273,10 +273,10 @@ EXTERN __xdata _AT_(0xE6C7) volatile BYTE FLOWLOGIC ; //Defines flow/hol
EXTERN __xdata _AT_(0xE6C8) volatile BYTE FLOWEQ0CTL ; //CTL states during active flow state
EXTERN __xdata _AT_(0xE6C9) volatile BYTE FLOWEQ1CTL ; //CTL states during hold flow state
EXTERN __xdata _AT_(0xE6CA) volatile BYTE FLOWHOLDOFF ;
EXTERN __xdata _AT_(0xE6CB) volatile BYTE FLOWSTB ; //CTL/RDY Signal to use as master data strobe
EXTERN __xdata _AT_(0xE6CB) volatile BYTE FLOWSTB ; //CTL/RDY Signal to use as master data strobe
EXTERN __xdata _AT_(0xE6CC) volatile BYTE FLOWSTBEDGE ; //Defines active master strobe edge
EXTERN __xdata _AT_(0xE6CD) volatile BYTE FLOWSTBHPERIOD ; //Half Period of output master strobe
EXTERN __xdata _AT_(0xE60C) volatile BYTE GPIFHOLDAMOUNT ; //Data delay shift
EXTERN __xdata _AT_(0xE60C) volatile BYTE GPIFHOLDAMOUNT ; //Data delay shift
EXTERN __xdata _AT_(0xE67D) volatile BYTE UDMACRCH ; //CRC Upper byte
EXTERN __xdata _AT_(0xE67E) volatile BYTE UDMACRCL ; //CRC Lower byte
EXTERN __xdata _AT_(0xE67F) volatile BYTE UDMACRCQUAL ; //UDMA In only, host terminated use only
@ -308,8 +308,8 @@ EXTERN __xdata _AT_(0xFC00) volatile BYTE EP8FIFOBUF[1024] ; // 512 byte EP8 b
/*-----------------------------------------------------------------------------
Special Function Registers (SFRs)
The byte registers and bits defined in the following list are based
on the Synopsis definition of the 8051 Special Function Registers for EZ-USB.
If you modify the register definitions below, please regenerate the file
on the Synopsis definition of the 8051 Special Function Registers for EZ-USB.
If you modify the register definitions below, please regenerate the file
"ezregs.inc" which includes the same basic information for assembly inclusion.
-----------------------------------------------------------------------------*/
@ -321,7 +321,7 @@ __sfr __at 0x84 DPL1;
__sfr __at 0x85 DPH1;
__sfr __at 0x86 DPS;
/* DPS */
__sbit __at 0x86+0 SEL;
__sbit __at (0x86+0) SEL;
__sfr __at 0x87 PCON; /* PCON */
//__sbit IDLE = 0x87+0;
//__sbit STOP = 0x87+1;
@ -330,14 +330,14 @@ __sfr __at 0x87 PCON; /* PCON */
//__sbit SMOD0 = 0x87+7;
__sfr __at 0x88 TCON;
/* TCON */
__sbit __at 0x88+0 IT0;
__sbit __at 0x88+1 IE0;
__sbit __at 0x88+2 IT1;
__sbit __at 0x88+3 IE1;
__sbit __at 0x88+4 TR0;
__sbit __at 0x88+5 TF0;
__sbit __at 0x88+6 TR1;
__sbit __at 0x88+7 TF1;
__sbit __at (0x88+0) IT0;
__sbit __at (0x88+1) IE0;
__sbit __at (0x88+2) IT1;
__sbit __at (0x88+3) IE1;
__sbit __at (0x88+4) TR0;
__sbit __at (0x88+5) TF0;
__sbit __at (0x88+6) TR1;
__sbit __at (0x88+7) TF1;
__sfr __at 0x89 TMOD;
/* TMOD */
//__sbit M00 = 0x89+0;
@ -373,21 +373,21 @@ __sfr __at 0x91 EXIF; // EXIF Bit Values differ from Reg320
__sfr __at 0x92 MPAGE;
__sfr __at 0x98 SCON0;
/* SCON0 */
__sbit __at 0x98+0 RI;
__sbit __at 0x98+1 TI;
__sbit __at 0x98+2 RB8;
__sbit __at 0x98+3 TB8;
__sbit __at 0x98+4 REN;
__sbit __at 0x98+5 SM2;
__sbit __at 0x98+6 SM1;
__sbit __at 0x98+7 SM0;
__sbit __at (0x98+0) RI;
__sbit __at (0x98+1) TI;
__sbit __at (0x98+2) RB8;
__sbit __at (0x98+3) TB8;
__sbit __at (0x98+4) REN;
__sbit __at (0x98+5) SM2;
__sbit __at (0x98+6) SM1;
__sbit __at (0x98+7) SM0;
__sfr __at 0x99 SBUF0;
__sfr __at 0x9A APTR1H;
__sfr __at 0x9B APTR1L;
__sfr __at 0x9C AUTODAT1;
__sfr __at 0x9C AUTODAT1;
__sfr __at 0x9D AUTOPTRH2;
__sfr __at 0x9E AUTOPTRL2;
__sfr __at 0x9E AUTOPTRL2;
__sfr __at 0x9F AUTODAT2;
__sfr __at 0xA0 IOC;
__sfr __at 0xA1 INT2CLR;
@ -398,14 +398,14 @@ __sfr __at 0xA2 INT4CLR;
__sfr __at 0xA8 IE;
/* IE */
__sbit __at 0xA8+0 EX0;
__sbit __at 0xA8+1 ET0;
__sbit __at 0xA8+2 EX1;
__sbit __at 0xA8+3 ET1;
__sbit __at 0xA8+4 ES0;
__sbit __at 0xA8+5 ET2;
__sbit __at 0xA8+6 ES1;
__sbit __at 0xA8+7 EA;
__sbit __at (0xA8+0) EX0;
__sbit __at (0xA8+1) ET0;
__sbit __at (0xA8+2) EX1;
__sbit __at (0xA8+3) ET1;
__sbit __at (0xA8+4) ES0;
__sbit __at (0xA8+5) ET2;
__sbit __at (0xA8+6) ES1;
__sbit __at (0xA8+7) EA;
__sfr __at 0xAA EP2468STAT;
/* EP2468STAT */
@ -436,78 +436,78 @@ __sfr __at 0xB6 OEE;
__sfr __at 0xB8 IP;
/* IP */
__sbit __at 0xB8+0 PX0;
__sbit __at 0xB8+1 PT0;
__sbit __at 0xB8+2 PX1;
__sbit __at 0xB8+3 PT1;
__sbit __at 0xB8+4 PS0;
__sbit __at 0xB8+5 PT2;
__sbit __at 0xB8+6 PS1;
__sbit __at (0xB8+0) PX0;
__sbit __at (0xB8+1) PT0;
__sbit __at (0xB8+2) PX1;
__sbit __at (0xB8+3) PT1;
__sbit __at (0xB8+4) PS0;
__sbit __at (0xB8+5) PT2;
__sbit __at (0xB8+6) PS1;
__sfr __at 0xBA EP01STAT;
__sfr __at 0xBB GPIFTRIG;
__sfr __at 0xBD GPIFSGLDATH;
__sfr __at 0xBE GPIFSGLDATLX;
__sfr __at 0xBF GPIFSGLDATLNOX;
__sfr __at 0xC0 SCON1;
/* SCON1 */
__sbit __at 0xC0+0 RI1;
__sbit __at 0xC0+1 TI1;
__sbit __at 0xC0+2 RB81;
__sbit __at 0xC0+3 TB81;
__sbit __at 0xC0+4 REN1;
__sbit __at 0xC0+5 SM21;
__sbit __at 0xC0+6 SM11;
__sbit __at 0xC0+7 SM01;
__sbit __at (0xC0+0) RI1;
__sbit __at (0xC0+1) TI1;
__sbit __at (0xC0+2) RB81;
__sbit __at (0xC0+3) TB81;
__sbit __at (0xC0+4) REN1;
__sbit __at (0xC0+5) SM21;
__sbit __at (0xC0+6) SM11;
__sbit __at (0xC0+7) SM01;
__sfr __at 0xC1 SBUF1;
__sfr __at 0xC8 T2CON;
/* T2CON */
__sbit __at 0xC8+0 CP_RL2;
__sbit __at 0xC8+1 C_T2;
__sbit __at 0xC8+2 TR2;
__sbit __at 0xC8+3 EXEN2;
__sbit __at 0xC8+4 TCLK;
__sbit __at 0xC8+5 RCLK;
__sbit __at 0xC8+6 EXF2;
__sbit __at 0xC8+7 TF2;
__sbit __at (0xC8+0) CP_RL2;
__sbit __at (0xC8+1) C_T2;
__sbit __at (0xC8+2) TR2;
__sbit __at (0xC8+3) EXEN2;
__sbit __at (0xC8+4) TCLK;
__sbit __at (0xC8+5) RCLK;
__sbit __at (0xC8+6) EXF2;
__sbit __at (0xC8+7) TF2;
__sfr __at 0xCA RCAP2L;
__sfr __at 0xCB RCAP2H;
__sfr __at 0xCC TL2;
__sfr __at 0xCD TH2;
__sfr __at 0xD0 PSW;
/* PSW */
__sbit __at 0xD0+0 P;
__sbit __at 0xD0+1 FL;
__sbit __at 0xD0+2 OV;
__sbit __at 0xD0+3 RS0;
__sbit __at 0xD0+4 RS1;
__sbit __at 0xD0+5 F0;
__sbit __at 0xD0+6 AC;
__sbit __at 0xD0+7 CY;
__sbit __at (0xD0+0) P;
__sbit __at (0xD0+1) FL;
__sbit __at (0xD0+2) OV;
__sbit __at (0xD0+3) RS0;
__sbit __at (0xD0+4) RS1;
__sbit __at (0xD0+5) F0;
__sbit __at (0xD0+6) AC;
__sbit __at (0xD0+7) CY;
__sfr __at 0xD8 EICON; // Was WDCON in DS80C320 EICON; Bit Values differ from Reg320
/* EICON */
__sbit __at 0xD8+3 INT6;
__sbit __at 0xD8+4 RESI;
__sbit __at 0xD8+5 ERESI;
__sbit __at 0xD8+7 SMOD1;
__sbit __at (0xD8+3) INT6;
__sbit __at (0xD8+4) RESI;
__sbit __at (0xD8+5) ERESI;
__sbit __at (0xD8+7) SMOD1;
__sfr __at 0xE0 ACC;
__sfr __at 0xE8 EIE; // EIE Bit Values differ from Reg320
/* EIE */
__sbit __at 0xE8+0 EIUSB;
__sbit __at 0xE8+1 EI2C;
__sbit __at 0xE8+2 EIEX4;
__sbit __at 0xE8+3 EIEX5;
__sbit __at 0xE8+4 EIEX6;
__sbit __at (0xE8+0) EIUSB;
__sbit __at (0xE8+1) EI2C;
__sbit __at (0xE8+2) EIEX4;
__sbit __at (0xE8+3) EIEX5;
__sbit __at (0xE8+4) EIEX6;
__sfr __at 0xF0 B;
__sfr __at 0xF8 EIP; // EIP Bit Values differ from Reg320
/* EIP */
__sbit __at 0xF8+0 PUSB;
__sbit __at 0xF8+1 PI2C;
__sbit __at 0xF8+2 EIPX4;
__sbit __at 0xF8+3 EIPX5;
__sbit __at 0xF8+4 EIPX6;
__sbit __at (0xF8+0) PUSB;
__sbit __at (0xF8+1) PI2C;
__sbit __at (0xF8+2) EIPX4;
__sbit __at (0xF8+3) EIPX5;
__sbit __at (0xF8+4) EIPX6;
/*-----------------------------------------------------------------------------
Bit Masks
@ -666,7 +666,7 @@ __sfr __at 0xF8 EIP; // EIP Bit Values differ from Reg320
/*
* Chip Revision Control Bits (REVCTL) - used to ebable/disable revision specific features
*/
*/
#define bmNOAUTOARM bmBIT1 // these don't match the docs
#define bmSKIPCOMMIT bmBIT0 // these don't match the docs

10
firmware/src/usrp2/usrp_rev2_regs.h
View File

@ -47,9 +47,9 @@
#define bmPA_TX_UNDERRUN bmBIT7 // misc pin to FPGA (underflow)
__sbit __at 0x80+0 bitS_CLK; // 0x80 is the bit address of PORT A
__sbit __at 0x80+1 bitS_OUT; // out from FX2 point of view
__sbit __at 0x80+2 bitS_IN; // in from FX2 point of view
__sbit __at (0x80+0) bitS_CLK; // 0x80 is the bit address of PORT A
__sbit __at (0x80+1) bitS_OUT; // out from FX2 point of view
__sbit __at (0x80+2) bitS_IN; // in from FX2 point of view
/* all outputs except S_DATA_FROM_PERIPH, FX2_2, FX2_3 */
@ -85,8 +85,8 @@ __sbit __at 0x80+2 bitS_IN; // in from FX2 point of view
#define bmPC_LED0 bmBIT6 // active low
#define bmPC_LED1 bmBIT7 // active low
__sbit __at 0xA0+1 bitALTERA_DATA0; // 0xA0 is the bit address of PORT C
__sbit __at 0xA0+3 bitALTERA_DCLK;
__sbit __at (0xA0+1) bitALTERA_DATA0; // 0xA0 is the bit address of PORT C
__sbit __at (0xA0+3) bitALTERA_DCLK;
#define bmALTERA_BITS (bmALTERA_DATA0 \