mirror of https://gerrit.osmocom.org/libusrp
WBXNG: power on/off TXMOD and Synth/VCO with set_enable
No similar function on RX, so RX is always on?
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@ -159,11 +159,13 @@ wbxng_base_tx::wbxng_base_tx(usrp_basic_sptr _usrp, int which, int _power_on)
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d_common = new adf4350(_usrp, d_which, d_spi_enable);
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// FIXME: power up the transmit side, but don't enable the mixer
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// power up the transmit side, but don't enable the mixer
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usrp()->_write_oe(d_which,(RX_TXN|TXMOD_EN|ENABLE_33|ENABLE_5), (RX_TXN|TXMOD_EN|ENABLE_33|ENABLE_5));
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usrp()->write_io(d_which, (power_on()|RX_TXN|TXMOD_EN|ENABLE_33|ENABLE_5), (RX_TXN|TXMOD_EN|ENABLE_33|ENABLE_5));
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fprintf(stderr,"Setting WBXNG TXMOD on");
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usrp()->write_io(d_which, (power_on()|RX_TXN|ENABLE_33|ENABLE_5), (RX_TXN|ENABLE_33|ENABLE_5));
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//set_lo_offset(4e6);
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// Disable VCO/PLL
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d_common->_enable(false);
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set_gain((gain_min() + gain_max()) / 2.0); // initialize gain
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}
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@ -183,11 +185,12 @@ wbxng_base_tx::shutdown()
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d_is_shutdown = true;
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// do whatever there is to do to shutdown
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// Disable VCO/PLL
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d_common->_enable(false);
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// Power down and leave the T/R switch in the R position
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usrp()->write_io(d_which, (power_off()|RX_TXN), (RX_TXN|ENABLE_33|ENABLE_5));
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// Power down VCO/PLL
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d_common->_enable(false);
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/*
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_write_control(_compute_control_reg());
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@ -202,9 +205,9 @@ wbxng_base_tx::set_auto_tr(bool on)
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{
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bool ok = true;
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if(on) {
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ok &= set_atr_mask (RX_TXN | ENABLE_33 | ENABLE_5);
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ok &= set_atr_txval(0 | ENABLE_33 | ENABLE_5);
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ok &= set_atr_rxval(RX_TXN | 0);
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ok &= set_atr_mask (RX_TXN | TXMOD_EN);
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ok &= set_atr_txval(0 | TXMOD_EN);
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ok &= set_atr_rxval(RX_TXN);
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}
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else {
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ok &= set_atr_mask (0);
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@ -222,12 +225,16 @@ wbxng_base_tx::set_enable(bool on)
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*/
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int v;
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int mask = RX_TXN | ENABLE_5 | ENABLE_33;
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int mask = RX_TXN | TXMOD_EN;
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if(on) {
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v = ENABLE_5 | ENABLE_33;
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v = TXMOD_EN;
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// Enable VCO/PLL
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d_common->_enable(true);
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}
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else {
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v = RX_TXN;
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// Disable VCO/PLL
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d_common->_enable(false);
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}
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return usrp()->write_io(d_which, v, mask);
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}
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@ -310,6 +317,9 @@ wbxng_base_rx::wbxng_base_rx(usrp_basic_sptr _usrp, int which, int _power_on)
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}
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d_common = new adf4350(_usrp, d_which, d_spi_enable);
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// Disable VCO/PLL
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d_common->_enable(true);
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usrp()->_write_oe(d_which, (RX2_RX1N|RXBB_EN|ATTN_MASK|ENABLE_33|ENABLE_5), (RX2_RX1N|RXBB_EN|ATTN_MASK|ENABLE_33|ENABLE_5));
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usrp()->write_io(d_which, (power_on()|RX2_RX1N|RXBB_EN|ENABLE_33|ENABLE_5), (RX2_RX1N|RXBB_EN|ATTN_MASK|ENABLE_33|ENABLE_5));
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@ -363,9 +373,9 @@ wbxng_base_rx::set_auto_tr(bool on)
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{
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bool ok = true;
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if(on) {
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ok &= set_atr_mask (ENABLE_33|ENABLE_5);
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ok &= set_atr_txval( 0);
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ok &= set_atr_rxval(ENABLE_33|ENABLE_5);
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ok &= set_atr_mask (RXBB_EN|RX2_RX1N);
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ok &= set_atr_txval( 0|RX2_RX1N);
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ok &= set_atr_rxval(RXBB_EN| 0);
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}
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else {
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ok &= set_atr_mask (0);
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@ -55,7 +55,7 @@ adf4350::adf4350(usrp_basic_sptr _usrp, int _which, int _spi_enable)
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/* Outputs */
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d_usrp->_write_oe(d_which, (CE_PIN | PDB_RF_PIN), (CE_PIN | PDB_RF_PIN));
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d_usrp->write_io(d_which, (0), (CE_PIN | PDB_RF_PIN));
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d_usrp->write_io(d_which, (CE_PIN), (CE_PIN | PDB_RF_PIN));
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/* Initialize the pin levels. */
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_enable(true);
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@ -70,6 +70,7 @@ adf4350::adf4350(usrp_basic_sptr _usrp, int _which, int _spi_enable)
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adf4350::~adf4350()
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{
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d_usrp->write_io(d_which, (0), (CE_PIN | PDB_RF_PIN));
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delete d_regs;
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}
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@ -95,9 +96,9 @@ void
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adf4350::_enable(bool enable)
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{
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if (enable){ /* chip enable */
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d_usrp->write_io(d_which, (CE_PIN | PDB_RF_PIN), (CE_PIN | PDB_RF_PIN));
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d_usrp->write_io(d_which, (PDB_RF_PIN), (PDB_RF_PIN));
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}else{
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d_usrp->write_io(d_which, 0, (CE_PIN | PDB_RF_PIN));
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d_usrp->write_io(d_which, 0, (PDB_RF_PIN));
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}
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}
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