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osmo-e1-hardware
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osmo-e1-hardware/gateware
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Sylvain Munaut bd399e96da gateware/icE1usb: Add custom pre-pack optimizations to fix build 
Without theses there are too many control-sets generated by yosys and
nextpnr can't find any valid placement.

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
 		2020-10-09 13:40:16 +02:00
..
build@f281c76d96 gateware/icE1usb: Add custom pre-pack optimizations to fix build 2020-10-09 13:40:16 +02:00
common gateware/common: Add register stage for the 'ack' and 'rdata' 2020-10-09 13:05:53 +02:00
cores gateware/cores: Update E1 & USB cores 2020-10-09 13:39:07 +02:00
doc gateware: Initial import of all common parts 2020-09-14 10:56:49 +02:00
e1-tracer gateware: Small tweaks and add option to ignore timing failure 2020-10-09 13:26:39 +02:00
icE1usb gateware/icE1usb: Add custom pre-pack optimizations to fix build 2020-10-09 13:40:16 +02:00
icE1usb-proto gateware: Small tweaks and add option to ignore timing failure 2020-10-09 13:26:39 +02:00
README.md gateware: Initial import of all common parts 2020-09-14 10:56:49 +02:00

README.md

E1 related gateware

This directory contains the iCE40 gateware for various boards hosted in this repository.

Licensing

Most of the cores/HDL in here is licensed under one of the CERL OHL 2.0 license. See the doc/ subdirectory for the full license texts and refer to each file header to know the license applicable to each file.

Some files have been imported from other projects with compatible licenses. Refer to each file header for the proper copyright and license information.

The repository also includes submodules which have their own licensing and copyright terms.