Harald Welte
fd79cfa8a3
e1-tracer: Add various BOM attributes
2020-08-15 15:19:35 +02:00
Martin Schramm
ea80688044
e1-tracer: further shrink the GND and 3V3 copper inwards left and right
...
... and run a local DRC
2020-08-14 19:10:02 +02:00
Martin Schramm
c56283aeee
e1-tracer: update again from ice40 lib
...
Another pin was found with 'wrong' direction state. Severity of this
is low as is shows only warnings in ERC, removing it anyways during
verification.
2020-08-14 13:38:33 +02:00
Martin Schramm
0e973a2f1e
e1-tracer: update from ICE40 lib after minor Eagle pin dir change
2020-08-14 13:23:53 +02:00
Martin Schramm
c21ca237df
e1-tracer: start a last renumber (after inserting 4x 0R)
2020-08-14 12:41:57 +02:00
Martin Schramm
a0c864cc30
e1-tracer: annotate jumper JP1 signals in silk screen
2020-08-14 12:23:22 +02:00
Martin Schramm
cad013f3c4
e1-tracer: minor silk screen cosmetics
2020-08-14 12:14:47 +02:00
Martin Schramm
c630d167be
e1-tracer: 4x 0R on R and B LED color selection wires
2020-08-14 12:07:08 +02:00
Martin Schramm
84d93f2518
Merge branch 'master' of ssh://git.osmocom.org/osmo-e1-xcvr
2020-08-14 11:10:27 +02:00
Martin Schramm
51efbb261a
e1-tracer: have more clearance of VBUS trace on PCB edge
2020-08-14 11:09:39 +02:00
Harald Welte
95478a23ef
Makefile: libraries should be in LIBS, not LDFLAGS
2020-08-14 00:07:19 +02:00
Martin Schramm
32a4aa0faf
e1-tracer: add a generic 0603 blue LED type w/ Vf=2.8V
...
designating LTST-C193TBKT-5A for now
2020-08-12 17:25:12 +02:00
Martin Schramm
488520323b
e1-tracer: improve power bypassing on LIU's VDDT and VDDA
...
...by placing 2x 22u per LIU (instead of 68u DNP), shrinking packages
from 1206 to 0805
2020-08-12 17:12:51 +02:00
Martin Schramm
d6c12735b1
e1-tracer: add 2x 33R series resistors in USB wires
...
and
* update improved HC73 package
* move upper third of PCB (LIUs and XOs) left
2020-08-12 16:07:06 +02:00
Martin Schramm
a5fd600135
e1-tracer: reapir missing VDD_3V3 on serial debug out's TVS
2020-08-11 23:36:55 +02:00
Martin Schramm
1460628d81
e1-tracer: 'update' our generic rc lib again to purge '..@1' packages
2020-08-11 22:00:52 +02:00
Martin Schramm
f75f35966a
e1-tracer: finish PCB
2020-08-11 14:35:05 +02:00
Martin Schramm
e4d7fbbe84
e1-tracer: state copyright in sch and brd
2020-08-06 16:24:00 +02:00
Martin Schramm
8c9a55db6e
e1-tracer: PCB almost ready
...
... with some room for improvement: LEDs might go to the right of the
2x RJ45
2020-08-06 16:10:16 +02:00
Martin Schramm
ff394bdbb0
e1-tracer: commit a first schematic
2020-07-27 13:44:20 +02:00
Harald Welte
190cd58ca7
increase clearance of ground planes; pad roundness
2019-12-20 23:55:34 +01:00
Harald Welte
c5a57a2ab5
enlarge board to have proper mounting holes for mechanical mounting
2019-12-20 23:43:50 +01:00
Harald Welte
dfe01d45f4
squash most parts and avoid silk screen overlaps all over the place
2019-12-20 23:35:19 +01:00
Harald Welte
2a8c4c5f33
change font to vector / update to v2
2019-12-20 23:14:49 +01:00
Martin Schramm
15e6f9a81b
e1_xcvr.brd: minor routing improvement on TRING signal
2018-05-29 20:05:48 +02:00
Martin Schramm
00ebf25701
replace old PULSE_T1094NL footprint, repair pin assignment (solves OSM#3269)
2018-05-29 19:52:28 +02:00
Martin Schramm
8ce574846d
laforge.lbr: PULSE_T1094NL: better tPlace and tDocu layer (for OSM#3270)
2018-05-29 19:21:38 +02:00
Martin Schramm
69f96a69ad
connect LIU's pin 44 to GND (solves OSM#3247)
2018-05-29 13:38:51 +02:00
Martin Schramm
ed2b563216
laforge.lbr: repair PULSE_T1094NL footprint and symbol (solves OSM#3270)
...
... and OSM#3271. - The transformer symbol is made of two identical coils
and hence it is not possible to mark the "2:" side (pins 9-11) separately.
But the naming of this coil was changed in a way, that, when invoked, the
"2" of the subpart name "TR1-1:2" shows towards the pins 9-11.
Maybe we should evolve to a device symbol with two coils merged rather than
two identical but separated, then an individual naming could honour the
2:1 side and can not be disturbed by e.g. subsequent mirroring. -
Also repaired the name and value designators' layer association.
2018-05-18 21:26:33 +02:00
Harald Welte
e00749c767
sam4s-e1.gnumeric: Avoid EXT4, add wire colors
2018-05-16 21:14:17 +02:00
Sylvain Munaut
d373558370
src: Add .gitignore for the software
...
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2018-05-16 20:23:56 +02:00
Sylvain Munaut
2c3c2757a5
osmo_e1f: Fix Makefile to use pkg-config
...
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
2018-05-16 20:22:44 +02:00
Harald Welte
a3ddfb1eff
Merge branch 'laforge/software'
2018-05-16 20:15:09 +02:00
Harald Welte
24531cebef
rename osmo_e1 to osmo_e1f ("f" for "framer")
2018-05-16 20:13:38 +02:00
Harald Welte
82fb9b7ec8
osmo_e1: fix make clean
2018-05-12 15:57:47 +02:00
Harald Welte
cdbcff9b18
CRC4: use proper CRC4 table to avoid bit-reversal of each byte
...
In commit 9bd2c9ffe7
we fixed the CRC4
computation by bit-reversing every byte before using it in the CRC
table. This is of course a waste of CPU cycles. Let's just compute
the CRC4 table slightly different (thanks to Dietter):
The following commands using pycrc from pycrc.org were used:
./pycrc.py --width=4 --poly=0x3 --reflect-in=false --reflect-out=false --xor-out=0 --xor-in=0 --algorithm table-driven --generate c -o crc4itu.c
./pycrc.py --width=4 --poly=0x3 --reflect-in=false --reflect-out=false --xor-out=0 --xor-in=0 --algorithm table-driven --generate h -o crc4itu.h
2018-05-12 09:44:03 +02:00
Harald Welte
ce18a04b27
add e1_test_dieter to deframe/decode dieters capture
2018-05-11 22:00:46 +02:00
Harald Welte
8a95fd5481
osmo_e1: Add HDLC framing/deframing
2018-05-11 22:00:18 +02:00
Harald Welte
37e2374545
osmo_e1: Silence the FSM logging
2018-05-11 21:21:01 +02:00
Harald Welte
9bd2c9ffe7
HACK to make CRC4 computation work
...
* reverse bit-order of every input byte when computing CRC4
* reverse bit-order of CRC4 value we receive in TS0 bits
I don't really understand why, but this makes the CRC check pass.
We probably need another table if we want to avoid this.
2018-05-11 20:48:31 +02:00
Harald Welte
d3941c6a98
osmo_e1.c: Fix handling of TS2..31 (use 'i', not '1')
2018-05-11 16:47:59 +02:00
Harald Welte
f01471d212
add some information related a SAM4S based USB-to-LIU adapter board idea
2018-05-07 15:37:26 +02:00
Harald Welte
0c756eb5ec
WIP: Software for E1 mux/demux
2018-05-07 15:37:26 +02:00
Harald Welte
5b15f681e5
add E1 tap hardware design
2012-07-21 20:22:23 +02:00
Harald Welte
ceb6ef1d21
laforge.lbr: fix amphenol sim reader footprint
2012-07-01 11:21:26 +02:00
Harald Welte
b59bfbc3cc
major update of laforge.lbr with lots of new components
2012-07-01 10:45:55 +02:00
Harald Welte
605e3e459f
add some glue code between the idt82 driver and at91lib SPI
2012-03-06 23:15:42 +01:00
Harald Welte
638afbb89b
'new' PCB routing by Christian Vogel
2012-03-06 21:53:51 +01:00
Harald Welte
28460ee9e5
major update of laforge.lbr with lots of new components
2012-02-20 23:42:18 +01:00
Harald Welte
da02f556e0
add initial driver skeleton for idt82v2081 chip
2012-01-14 18:18:31 +01:00