Harald Welte
972c8a0cb8
mpcie-breakout: Change to vertical SMA jacks
2017-03-23 21:49:04 +01:00
Harald Welte
eb08c68a3e
mpcie-breakout: rounding of pads
2017-03-23 21:34:09 +01:00
Harald Welte
8d11394ffa
mpcie-breakout: DRC changes
2017-03-23 21:18:35 +01:00
Harald Welte
5704c5bdc9
mpcie-breakout: disable tPlace layer
2017-03-23 21:16:26 +01:00
Harald Welte
724e3f879e
mpcie-breakout: USB_VBUS second parallel via to reduce impedance
2017-03-23 21:04:14 +01:00
Harald Welte
c7db59d408
mpcie-breakout: Digikey part numbers for U.FL and SMA
2017-03-23 20:51:53 +01:00
Harald Welte
d86d7286d1
mcie-breakout: Align bLabels, more vias, cosmetics
2017-03-23 20:46:23 +01:00
Harald Welte
b496b068aa
mpcie-breakout: Add third U.FL-SMA group
2017-03-23 20:25:13 +01:00
Harald Welte
623924050d
mpcie-breakout: Enlarge to 70x70mm, add SMA, U.FL and Mounting Holes
2017-03-23 17:24:01 +01:00
Harald Welte
9b5d540b1f
mv-uart: Fix 'board doesn't enumerate if JP4 is closed" issue
...
Make sure the LDO is always powered up, so the CP2105 internal and
external !RESET pull-ups are towards an active VIO voltage, rather than
one that is switched off by !SUSPEND and thus keeps the CP2105 in reset.
Closes : #1870 (https://osmocom.org/issues/1870 )
2016-12-05 19:42:27 +01:00
Harald Welte
2093ba575d
add PCBA photographs
2016-11-25 17:05:33 +01:00
Harald Welte
50c018de16
mpcie-breakoud: Add pdf renderings of schematics
2016-10-28 16:19:52 +02:00
Harald Welte
05e5237337
add mnb/mt files for mv-uart and mpcie-breakout
2016-10-28 16:19:36 +02:00
Harald Welte
cf99c3f3cf
mpcie-breakout: mark C4 as POPULATED=FALSE
2016-10-28 16:06:59 +02:00
Harald Welte
db16b1529f
mv-uart: Add schematics + placement as PDF
2016-10-28 15:58:45 +02:00
Harald Welte
304e6f53ff
mv-uart: Add digikey attributes for various 2.54mm hedaers
2016-10-28 15:56:18 +02:00
Harald Welte
9a742af2cf
add PCB panel images for mv-uart and mpcie-breakout
2016-10-28 15:36:55 +02:00
Harald Welte
c70006a70c
mpcie-breakout: Change '1' marker of JP4 and avoid silk-screen overlap
2016-10-27 20:09:19 +02:00
Harald Welte
0427388990
mpcie-breakout: fix DRC violations (clearance)
2016-10-27 19:53:11 +02:00
Harald Welte
9eb09df373
mpcie-breakout: Add series LED for LED_WWAN
2016-10-27 19:49:06 +02:00
Harald Welte
ab542cd1af
mpcie-breakout: Fix R4 (0603, not 0201 part)
2016-10-27 19:41:37 +02:00
Harald Welte
7001d5fb4f
mpcie-breakout: change 100uF caps from 1210 to 1206, reducing height
...
The current 100uF caps are too high at 2.9mm. They touch the shielding
can of Quectel EC-20 modules, for exampel. Let's use 1206 packaged
versions at 1.6mm instead. Also, add two more, for safety.
2016-10-27 19:35:03 +02:00
Harald Welte
746eda7f13
mv-uart: Use SP6T flash *without* OFF position
2016-10-27 17:56:24 +02:00
Harald Welte
07cf79c97a
mpci-breakout: Add BOM attributes + export BOM
2016-10-10 17:56:57 +02:00
Harald Welte
dc5f8d5611
add .gitignore
2016-10-10 17:34:01 +02:00
Harald Welte
a4a21de6d0
Complete BOM attributes + export BOM
2016-10-10 17:33:47 +02:00
Harald Welte
2b96b160df
mpcie-breakout: Beautify schematics
2016-10-09 03:23:42 +02:00
Harald Welte
49746fa94c
mv-uart: Add PDF renderings
2016-10-09 03:17:18 +02:00
Harald Welte
fdb6fe3b25
mv-uart: Beatify schematics + Add comments
2016-10-09 03:16:53 +02:00
Harald Welte
682f9edd08
mpcie-breakout: Add Digikey LINK for all major parts
2016-10-09 02:53:14 +02:00
Harald Welte
6ae6a1808c
mv-uart: Add digikey link for all major parts
2016-10-09 02:44:28 +02:00
Harald Welte
29e2c271ea
mv-uart: Add generated gerber files
2016-10-08 22:06:40 +02:00
Harald Welte
8da77d2d52
mv-uart: use Seeed Studio DRU
2016-10-08 22:04:08 +02:00
Harald Welte
1031c99873
mv-uart: Add labels with name / copyright / license
2016-10-08 22:03:38 +02:00
Harald Welte
8b36c27ed7
mv-uart: align tNames labels in non-overlapping fashion
2016-10-08 21:54:21 +02:00
Harald Welte
41ede2cd26
mpcie-breakout: add rendered gerber files
2016-10-08 21:44:58 +02:00
Harald Welte
a34810e73e
mpcie-breakoud: Fix layer of JP4 label on silk-screen
2016-10-08 21:44:42 +02:00
Harald Welte
bd7032d6a3
initial import of new mpcie breakout board project
2016-10-08 21:39:30 +02:00
Harald Welte
11ab69768a
move all mv-uart files to sub-directory
2016-10-08 21:38:46 +02:00
Harald Welte
e7150cd6e4
first fully routed version of mv-uart
2016-10-07 21:22:44 +02:00
Harald Welte
81c9e06f63
WIP: design for a multi-voltage USB UART
...
* an adjustible LDO with rotary switch is able to configure the UART
voltage levels as needed.
* alternatively, the UART logic level voltage (in the 1.8-3.3V range)
can be provided by an external voltage reference.
* TVS diodes protect the USB and UART sides from overvoltage and ESD
* all voltages are available on a header to supply external circuitry
* five GPIO pins are available on a header
2016-10-07 19:50:07 +02:00
Harald Welte