c4c0d14ea4
stm32: exti: stm32g0 have enhanced EXTI_[FR]PR regs instead of EXTIR_PR, use them if defined.
...
Make exti_get_flag_status and exti_reset_request use EXTI_RPR and EXTI_FPR if present instead of EXTI_PR.
This is less precise than offered by the RPR/FPR registers, but makes
for a consistent experience in the common API.
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
2019-01-31 09:57:46 +00:00
b98dd8eee0
stm32: exti: exti_select_source: rework and use EXTI_EXTICR.
...
EXTICR on stm32g0 is in exti registers range. Previous chips used to have that
gpio port exti mux configuration accessible via AFIO_EXTICR or SYSCFG_EXTICR.
Also, the new chip now use 8 bits coded value instead of previously 4 for the
extcr mux selection value (see AFIO/SYSCFG/EXTI_EXTICR_FIELDSIZE)
Let's define two helpers: EXTICR_SELECTION_REG (to get proper AFIO/SYSCFG/
EXTI_EXTICR register) and EXTICR_SELECTION_FIELDSIZE (to get proper AFIO/SYSCFG/
EXTI_EXTICR_FIELDSIZE value), and use it them exti_select_source to determine
exticr mux selection bits shift and mask.
2019-01-31 09:57:46 +00:00
553c876fa5
stm32: exti: define AFIO/SYSCFG_EXTICR_FIELDSIZE for all chip.
...
While on all current chips, exticr gpio port mux selection is coded on 4 bits,
stm32g0 EXTI_EXTICR register uses 8 bits. Align all exti header to reference
that value (was previously defined for f0 as SYCFG_EXTICR_SKIP)
2019-01-31 09:57:43 +00:00
7afd86db30
stm32l[01]: flash common: add flash_unlock_acr, allowing to unlock FLASH_ACR RUN_PD bit.
...
flash_unlock_acr allows to unlock RUN_PD bit from FLASH_ACR register. Relock is done automatically
when writing 0 to RUN_PD, so no flash_lock_acr method.
2019-01-31 09:35:55 +00:00
74f460feac
stm32f0: adc: fix doc.
2019-01-25 15:25:11 +01:00
ff9664389b
stm32: exti: move register definition of all current stm32 devices to common_v1
...
Preparation for stm32g0 support, as this chip's exti register map evolved and is
no longer common ...
2019-01-18 18:33:55 +01:00
9cadd60b3c
stm32: rtc: Fixed typo in macro def (RTC_DR_MT_MASK)
2019-01-18 10:32:43 +00:00
708fe1516c
stm32: fix nvic channels name to match dma1/2 on stm32f09x
2019-01-18 10:31:32 +00:00
b725a793bf
doc: align doc, add missing entries in layouts.
2019-01-17 16:35:50 +01:00
9551da6b6b
devices.data: add stm32l15xx E series
...
Bigger brother parts, such as the l152re nucleo64 board.
2019-01-16 22:25:01 +00:00
718f86935a
EFM32 I2C: fix base undeclared
...
libopencm3/include/libopencm3/efm32/common/i2c_common.h:234:29: error: 'base' undeclared (first use in this function)
#define I2C0_CTRL I2C_CTRL(base)
2019-01-14 11:51:08 +00:00
33387e8f96
stm32f0:adc: add missing declaration
...
fixes: 7e1d3daa
2019-01-12 22:19:49 +00:00
4edba3111d
common: support inclusion into assembly files
...
Suggested in https://github.com/libopencm3/libopencm3/pull/981
2019-01-11 23:09:27 +00:00
72e449f529
stm32f3: rcc: fix typo in PLL clocks for APB1
...
Reported by jabjoe on irc, fixed by zyp
2019-01-10 14:42:54 +00:00
ad10e96811
stm32l4:dma: add Channel Selection defines
...
Far from complete support for the channel selection systems on f0/l4,
but at least brings in the defines needed for doing this yourself.
Fixes https://github.com/libopencm3/libopencm3/issues/1001
2018-12-30 21:03:40 +00:00
7e1d3daa11
stm32f0: adc: API call to clear EOS flag
2018-12-06 18:40:30 -08:00
1adc418f9a
stm32f42/f43: rcc: add 180 MHz clock options
2018-11-12 21:41:05 +00:00
f0e5c73d98
stm32: pll: disable before configuring
2018-11-12 16:49:56 +01:00
8b13977ea0
stm32f0: add DMA1 compatibility alias
2018-11-09 15:34:58 +00:00
b7a9968e4f
fixup! stm32f09: add register definitions for DMA2
2018-11-06 18:48:18 +01:00
a9c0008290
stm32f09: add register definitions for DMA2
2018-11-06 12:58:36 +01:00
53347c266b
stm32f09: add register definitions for USART5..8
2018-11-06 11:35:40 +01:00
3af05fb862
stm32f7: spi: fix include error
...
Badly splitting commits.
Fixes: 2619a45
2018-10-23 21:43:29 +00:00
1883a4311f
msp432: whitespace fixups spaces->tabs
...
whitespace only change.
2018-10-23 21:33:16 +00:00
a63d0499de
msp432/e4: Add GPIO support
2018-10-23 21:21:54 +00:00
2619a4506c
stm32f7: use spi v2 peripheral.
...
F7 indeed has v2 peripheral, not the v1. Distinguishing figure is the
8/16bit fifo.
2018-10-23 21:21:42 +00:00
076cd67530
stm32: spi-v2: Frame format is available for all.
...
All spi v2 peripherals include the Motorola/TI Frame formatting options
introduced with F2.
2018-10-23 21:21:36 +00:00
f6517f7816
stm32: adc common v2: add circular dma mode
...
Tested only on the F3 so far.
2018-10-20 11:46:47 +00:00
bc7e454741
stm32f7: include common dma code
...
Originally reported at https://github.com/libopencm3/libopencm3/pull/978
2018-10-20 11:40:38 +00:00
18eadcfda5
stm32: timer_common: add timer21-22, found on stm32l0 chips.
...
stm32l0 devices have tim21 and tim22.
2018-10-06 09:53:54 +00:00
4b16af6e24
stm32: iwdg: correct calculation for all ranges.
...
The original calculations miscalculated ranges such as
512..639 or 1024..1151 or ... or 32768..32895
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
2018-10-05 23:31:52 +00:00
239b4a4704
stm32f7: add irqs from latest ref manuals
...
Updated from RM410 rev4, RM0385rev8 and RM0431 rev3
Originally reported at https://github.com/libopencm3/libopencm3/issues/974
2018-10-03 17:12:42 +00:00
0994762ae7
nvic: include the source json filename in the generated output
...
Make it a bit more obvious to people what they need to change.
Reported via: https://github.com/libopencm3/libopencm3/issues/974
2018-10-03 16:21:08 +00:00
e2b67d7264
Set PLL source in rcc_clock_setup_pll() for STM32L0
2018-09-29 07:55:16 -07:00
6b0fd864a1
stm32f7: fix RCC_APB1 defns for USART7/USART8
...
The reset and low power definitions for USART7/USART8 were correct, but
not the primary enable registers.
Fixes: https://github.com/libopencm3/libopencm3/issues/969
2018-09-24 10:35:16 +00:00
0d7f1f7708
stm32: f24: dma: clarify stream/channel
...
It's always stream on the "new" dma controller (unless it's channel....)
Fix a couple of inconsistent prototypes that had carried over from f1
originally. Reported by vampi on irc.
2018-09-15 09:27:31 +00:00
cccc1267c5
stm32f7: drop toolchain check for m7 support.
...
the 2014q3 or later toolchains are now readily available, and we should
now just consider this a user problem. This gets us out of trying to
parse compiler help output and chasing our own tail.
Fixes https://github.com/libopencm3/libopencm3/issues/965
2018-09-10 21:44:16 +00:00
9ddafa6284
stm32f7: enable common timers support
2018-09-09 16:38:56 +00:00
cae295ee2c
doc: cm3/scb+scs: turn on existing documentation
...
Lots of registers were already documented extensively. Turn it all in
doxygen with groups and the right syntax.
2018-09-09 15:27:41 +00:00
1ad2cda496
doc: add all cm3 headers to doxygen.
...
Just get them all included as they are. Gets them grouped up and
visible so we can start clarifying the rest of their docs.
2018-09-09 15:27:41 +00:00
a21aeab3b1
doc: make sure include/cm3 is pulled in properly.
...
Much as we had to pull in the individual target's include files
manually, because they're useful without necessarily having .c files
using them, the cortex core headers also need to be included. This also
pulls in the doc-cm3.h file that setup nice groupings.
2018-09-09 15:27:41 +00:00
6f0f2ebe8e
readme: add miniblink/template references
2018-08-29 15:03:43 +00:00
e04f10e591
tests: gadget0: stm32f3: use library clock setups
...
F3 rcc configs were overhauled and we can now use standard init code
instead of specifying our own custom clock config.
2018-08-29 10:17:55 +00:00
de538c4b80
stm32f7: desig: link common implementation
2018-08-29 09:56:43 +00:00
889b7de0d7
stm32: adc: Add functions to get and clear flags
...
This includes adding documentation to the status flags.
Originally tracked at: https://github.com/libopencm3/libopencm3/pull/833
Modified to drop whitespace changes, and simply boolean return.
2018-08-28 22:00:07 +00:00
743513a4b1
stm32: add dma_get_number_of_data
...
Original discussion at: https://github.com/libopencm3/libopencm3/pull/702
2018-08-28 22:00:01 +00:00
824beaa472
lm4f: timers: add basic register definitions
...
Add the timers to the memory map and the basic registers at least.
2018-08-28 13:26:11 +00:00
08c76f25ec
stm32: spi: drop empty spi.c files.
...
They were originally used to make sure that the doxygen was generated
correctly, but that style is no longer necessary.
There may be more peripherals that can be "cleaned" like this, but let's
do them one step at a time, as we work on that area.
2018-08-27 22:57:41 +00:00
f3c620b51b
stm32f7: spi: include common code
2018-08-27 22:57:28 +00:00
00e32ccb4c
gitignore new generated code
2018-08-27 21:48:16 +00:00
Guillaume Revaillot