- Change .power_save to .voltage_scale, a pwr_vos_scale enum
- Enable pwr clock before setting VOS scale
- Fix flash wait states
- Make flash_set_ws more robust
... since Clang doesn't infer the function type on '#pragma weak x = y'-style
declarations, and instead leaves it as "<overloaded function type>", thus
leading to a type conflict when assigning the ISRs to the interrupt vector.
This has no impact on normal use, but it makes it more compatible, nd
that's always a good thing.
Before (vector_nvic.c generated)
...
#pragma weak usart1_isr = blocking_handler
...
After:
...
void usart1_isr(void) __attribute__((weak, alias("blocking_handler")));
...
According to: https://gcc.gnu.org/onlinedocs/gcc-6.2.0/gcc/ARM-Function-Attributes.html
"Only basic asm statements can safely be included in naked functions (see Basic
Asm). While using extended asm or a mixture of basic asm and C code may appear
to work, they cannot be depended upon to work reliably and are not supported."
The reference manual is incorrect, the data sheet is correct.
There is 320K of ram (up to address 0x20050000). This has been
tested on the STM32F469I-disco board.
The LTDC include file was defined with combined bit
semantics and bit position. As a result instead of
LTDC_GCR_VSPOL which is the bit which defines vertical
sync polarity, this had been defined to be
LTDC_GCR_VSPOL_LOW (0) and LTDC_GCR_VSPOL_HIGH (non zero).
This sort of define makes it impossible to know ahead of
time what operation would set or reset the bit (some are
negative logic, others are postive logic, so affirmative
defines could mean either "set the bit" or "reset the bit"
I've added the non-semantic bit define so that it is clear
in my code if the bit is being set or reset.
Discussion took place at https://github.com/libopencm3/libopencm3/pull/889
We didn't actually mark it deprecated very well, but it was
non-functional, and simply a poorly implemented wrapper for
rcc_periph_reset_pulse() anyway.
It's now been obsoleted in the examples for more than a year, and it's
time to kill it outright.
Fixes: https://github.com/libopencm3/libopencm3/issues/709
Only applied to STM32 doc trees at present.
Instead of declaring a group for "STM32blah" in the doc-blah.h files,
and then trying to put all the common+specific peripheral code into
those groups, (which is what led to the stub doxygen holder empty .c
files) Just use a standard name like "Peripheral APIS" and place
everything into that.
Demonstrated by converting ADC and USART peripherals, which is
definitely not complete, but it shows how to make things less magical,
and less prone to copy/paste errors. Now, you can copy/paste and it
will do the right thing, because everyone uses the same group names.
This is also how to unify the mix of "STM32blah->Periphblah" and _also_
the dangling "periph_file" modules in doxygen, it merges them together
properly, as they're intended to be really.
On some targets these weren't even being referenced, on others they
were, in all cases they were empty and contributed no value.
They _actually_ served to declare groupings for doxygen, but we can do
that in a different manner, without having to have dummy files around.
Deprecate the old routine and make a new one that actually handles HSI
and HSE properly, and includes the predivider and the usb divider
settings as well.
STM32L0 uses the same DMA peripheral as STM32F0, F1, L1 and others
with some differences. Those are mostly in the number of supported
controllers and channels.
This patch enables the basic support with no attempt to only expose
the available controllers / channels.
For more information see the ST Application Note AN2548.
Signed-off-by: Martin Sivak <mars@montik.net>
split spi stuff in three part:
- v1 : basic spi peripheral
- v1_frf : v1 spi with frf mode additional bit in spi_cr2 / spi_sr
- v2 : spi with variable datasize, fifo and other fancy stuff.
v1 maps to f1 chips
v1_frf to f2, f4 and l0,l1
v2 to f0, f3 and l4
This breaks spi_master_init API for v2 devices : function prototype from
common spi header used to be abused, with DFF bit reused for CRCL bit.
New v2 spi_master_init does not handle anymore CRCL bits, as it does not
usually mess with other crc configuration.
Instead of every "simple" target having their own duplicate file with
all the section mappings, just provide a single, simple,
"cortex-m-generic.ld" that works with our startup code and any simple
rom/ram system. This also drops the pointless copying of files all over
the place. Using -L flags properly is sufficient, and the standard file
is now in the root of the library already.
Jordi Pakey-Rodriguez