Add a complete API for controlling the UART interrupts.
Doxygen documentation with inline code examples is also provided in this patch.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Add basic functionality needed to setup the UART and send/recieve data.
Interrupts, DMA, and more advanced features are not implemented in this patch.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
rcc_set_pll_divisor() would take the number we wanted to divide the 400MHz
clock and put it directly in the RCC2 register. This caused the clock to always
be one speed tier slower than expected. The value of the divisor must be
decremented by 1, so a divisor of 5 will be written as 4 in the RCC2.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
f1/timer.
Added timer_ic_set_polarity to timer_common_f24 with
the enum tim_ic_pol now including trigger on both edges.
Changed timer_slave_set_polarity to use enum tim_et_pol
rather than tim_ic_pol.
In response to suggestion of stinkydiver73 on 24 March that
timers in all families have an option for triggers on both
edges, except F1.
Current way of having a globally, but weakly defined static buffer has
several shortcomings:
- It forces user to have a certain "magic" byte array variable if
they want to have a control buffer of different size.
- Having a globally defined static array and a separate function to
tell USB core about its size is error prone.
- Its inner workings are not easily understandable form cursory look
at API and one needs to go and look at the implementation code to
connect all the pieces into a solid picture of how it works
This commit adds two parameters to 'usbd_init' call that allow user to
specify the pointer to the area of memory and a size of that memory
which would be used by the USB core to store the data received during
DATA stage of control requests. This approach, while further
complicating the prototype of 'usbd_init', provides user with more
flexibility allowing for any custom area of memory of any size to be
used as control buffer. It also forces user to provide both address
and memory size at the same time thus avoiding the possibility of user
redefining 'usbd_control_buffer', but not calling
'usbd_set_control_buffer_size' after that.
This also report bug fixes about data alignment and bss storage to EFM32 &
LM3S targets.
Note: removed chrysn copyright statement as the file is a verbatim copy of
previous files.
Adding this attribute allows to avoid warnings issued by GCC in cases
when 'scb_reset_system' is used as a last call in a function with
"noreturn" attribute set(usually reset handler of some sorts)
F2 and F4 have a common section to deal with the options register (TIM2 and TIM5 only)
L1 has been made common with timer_common_all as its options register has very different settings to F2/F4. Code is in the L1/timer.c L1/timer.h files
Note that F3 and F05 timers should fit into this scheme, with F3 having additional features.
Bundled with this is L1/pwr.h to change a documentation setting
Also all the Doxyfiles have added "ENABLE_PREPROCESSING = NO" to fix a problem introduced by commit 118.
(prevents inclusion and also issues warning)
Changes to some source files to remove references to common headers.
Changes to rng.h to make guard symbols the same in f2 and f4.
to remove errors, duplications and inconsistencies.
File lib/stm32/f1/pwr.c - all code removed as it duplicates that in common/pwr_common.c
Remaining changes do not affect code. Compiles OK.
TODO efm32 has no code so generates no modules
TODO F2 needs pwr.c
TODO L1 needs dma.h and dma.c
Fergus Noble