electronics
/
libopencm3
9
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

This mainly moves the STM32 timers' code to the common area. 

F2 and F4 have a common section to deal with the options register (TIM2 and TIM5 only)
L1 has been made common with timer_common_all as its options register has very different settings to F2/F4. Code is in the L1/timer.c L1/timer.h files

Note that F3 and F05 timers should fit into this scheme, with F3 having additional features.

Bundled with this is L1/pwr.h to change a documentation setting
Also all the Doxyfiles have added "ENABLE_PREPROCESSING = NO" to fix a problem introduced by commit 118.
This commit is contained in:
Ken Sarkies 2013-03-09 14:39:01 +10:30
parent a9a85f080b
commit 5b8953124e
31 changed files with 1706 additions and 1253 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
doc/efm32g/Doxyfile
View File

@ -27,3 +27,6 @@ TAGFILES = ../cm3/cm3.tag=../../cm3/html \
GENERATE_TAGFILE = efm32g.tag
ENABLE_PREPROCESSING = NO

3
doc/efm32gg/Doxyfile
View File

@ -27,3 +27,6 @@ TAGFILES = ../cm3/cm3.tag=../../cm3/html \
GENERATE_TAGFILE = efm32gg.tag
ENABLE_PREPROCESSING = NO

3
doc/efm32lg/Doxyfile
View File

@ -27,3 +27,6 @@ TAGFILES = ../cm3/cm3.tag=../../cm3/html \
GENERATE_TAGFILE = efm32lg.tag
ENABLE_PREPROCESSING = NO

3
doc/efm32tg/Doxyfile
View File

@ -27,3 +27,6 @@ TAGFILES = ../cm3/cm3.tag=../../cm3/html \
GENERATE_TAGFILE = efm32tg.tag
ENABLE_PREPROCESSING = NO

3
doc/lm3s/Doxyfile
View File

@ -25,3 +25,6 @@ TAGFILES = ../cm3/cm3.tag=../../cm3/html
GENERATE_TAGFILE = lm3s.tag
ENABLE_PREPROCESSING = NO

3
doc/lm4f/Doxyfile
View File

@ -25,3 +25,6 @@ TAGFILES = ../cm3/cm3.tag=../../cm3/html
GENERATE_TAGFILE = lm4f.tag
ENABLE_PREPROCESSING = NO

3
doc/lpc13xx/Doxyfile
View File

@ -25,3 +25,6 @@ TAGFILES = ../cm3/cm3.tag=../../cm3/html
GENERATE_TAGFILE = lpc13xx.tag
ENABLE_PREPROCESSING = NO

3
doc/lpc17xx/Doxyfile
View File

@ -25,3 +25,6 @@ TAGFILES = ../cm3/cm3.tag=../../cm3/html
GENERATE_TAGFILE = lpc17xx.tag
ENABLE_PREPROCESSING = NO

3
doc/lpc43xx/Doxyfile
View File

@ -25,3 +25,6 @@ TAGFILES = ../cm3/cm3.tag=../../cm3/html
GENERATE_TAGFILE = lpc43xx.tag
ENABLE_PREPROCESSING = NO

11
doc/stm32f1/Doxyfile
View File

@ -16,14 +16,14 @@
WARN_LOGFILE = doxygen_stm32f1.log
INPUT = ../../include/libopencm3/license.dox \
../../include/libopencm3/stm32/f1 \
../../include/libopencm3/stm32/common
../../include/libopencm3/stm32/f1 \
../../include/libopencm3/stm32/common
INPUT += ../../lib/stm32/f1 \
../../lib/stm32/common
../../lib/stm32/common
EXCLUDE = ../../include/libopencm3/stm32/f1/usb.h \
../../include/libopencm3/stm32/f1/usb_desc.h
../../include/libopencm3/stm32/f1/usb_desc.h
EXCLUDE_PATTERNS = *_common_f24.h *_common_f24.c
@ -33,3 +33,6 @@ TAGFILES = ../cm3/cm3.tag=../../cm3/html
GENERATE_TAGFILE = stm32f1.tag
ENABLE_PREPROCESSING = NO

3
doc/stm32f2/Doxyfile
View File

@ -32,3 +32,6 @@ TAGFILES = ../cm3/cm3.tag=../../cm3/html
GENERATE_TAGFILE = stm32f2.tag
ENABLE_PREPROCESSING = NO

3
doc/stm32f4/Doxyfile
View File

@ -32,3 +32,6 @@ TAGFILES = ../cm3/cm3.tag=../../cm3/html
GENERATE_TAGFILE = stm32f4.tag
ENABLE_PREPROCESSING = NO

9
doc/stm32l1/Doxyfile
View File

@ -22,9 +22,11 @@ INPUT = ../../include/libopencm3/license.dox \
INPUT += ../../lib/stm32/l1 \
../../lib/stm32/common
EXCLUDE = ../../include/libopencm3/stm32/common/gpio_common_f24.h
EXCLUDE = ../../include/libopencm3/stm32/common/gpio_common_f24.h \
../../include/libopencm3/stm32/common/timer_common_f24.h
EXCLUDE += ../../lib/stm32/common/gpio_common_f24.c
EXCLUDE += ../../lib/stm32/common/gpio_common_f24.c \
../../lib/stm32/common/timer_common_f24.c
EXCLUDE_PATTERNS =
@ -34,3 +36,6 @@ TAGFILES = ../cm3/cm3.tag=../../cm3/html
GENERATE_TAGFILE = stm32l1.tag
ENABLE_PREPROCESSING = NO

1113
include/libopencm3/stm32/common/timer_common_all.h Normal file
View File

File diff suppressed because it is too large Load Diff

99
include/libopencm3/stm32/common/timer_common_f24.h Normal file
View File

@ -0,0 +1,99 @@
/** @addtogroup timer_defines
@author @htmlonly &copy; @endhtmlonly 2011 Fergus Noble <fergusnoble@gmail.com>
*/
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2011 Fergus Noble <fergusnoble@gmail.com>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
/* THIS FILE SHOULD NOT BE INCLUDED DIRECTLY, BUT ONLY VIA TIMER.H
The order of header inclusion is important. timer.h includes the device
specific memorymap.h header before including this header file.*/
#ifdef LIBOPENCM3_TIMER_H
#ifndef LIBOPENCM3_TIMER_COMMON_F24_H
#define LIBOPENCM3_TIMER_COMMON_F24_H
#include <libopencm3/stm32/common/timer_common_all.h>
/*
* TIM2 and TIM5 are now 32bit and the following registers are now 32-bit wide:
* CNT, ARR, CCR1, CCR2, CCR3, CCR4
*/
/* Timer 2/5 option register (TIMx_OR) */
#define TIM_OR(tim_base) MMIO32(tim_base + 0x50)
#define TIM2_OR TIM_OR(TIM2)
#define TIM5_OR TIM_OR(TIM5)
/* --- TIM2_OR values ---------------------------------------------------- */
/* ITR1_RMP */
/****************************************************************************/
/** @defgroup tim2_opt_trigger_remap TIM2_OR Timer 2 Option Register Internal Trigger 1 Remap
Only available in F2 and F4 series.
@ingroup timer_defines
@{*/
/** Internal Trigger 1 remapped to timer 8 trigger out */
#define TIM2_OR_ITR1_RMP_TIM8_TRGOU (0x0 << 10)
/** Internal Trigger 1 remapped to PTP trigger out */
#define TIM2_OR_ITR1_RMP_PTP (0x1 << 10)
/** Internal Trigger 1 remapped to USB OTG FS SOF */
#define TIM2_OR_ITR1_RMP_OTG_FS_SOF (0x2 << 10)
/** Internal Trigger 1 remapped to USB OTG HS SOF */
#define TIM2_OR_ITR1_RMP_OTG_HS_SOF (0x3 << 10)
/**@}*/
#define TIM2_OR_ITR1_RMP_MASK (0x3 << 10)
/* --- TIM5_OR values ---------------------------------------------------- */
/* ITR4_RMP */
/****************************************************************************/
/** @defgroup tim5_opt_trigger_remap TIM5_OR Timer 5 Option Register Internal Trigger 4 Remap
Only available in F2 and F4 series.
@ingroup timer_defines
@{*/
/** Internal Trigger 4 remapped to GPIO (see reference manual) */
#define TIM5_OR_TI4_RMP_GPIO (0x0 << 6)
/** Internal Trigger 4 remapped to LSI internal clock */
#define TIM5_OR_TI4_RMP_LSI (0x1 << 6)
/** Internal Trigger 4 remapped to LSE internal clock */
#define TIM5_OR_TI4_RMP_LSE (0x2 << 6)
/** Internal Trigger 4 remapped to RTC output event */
#define TIM5_OR_TI4_RMP_RTC (0x3 << 6)
/**@}*/
#define TIM5_OR_TI4_RMP_MASK (0x3 << 6)
/* --- Function prototypes ------------------------------------------------- */
BEGIN_DECLS
void timer_set_option(u32 timer_peripheral, u32 option);
END_DECLS
#endif
#else
#warning "timer_common_f24.h should not be included explicitly, only via timer.h"
#endif

40
include/libopencm3/stm32/f1/timer.h Normal file
View File

@ -0,0 +1,40 @@
/** @defgroup timer_defines Timer Defines
@brief <b>libopencm3 Defined Constants and Types for the STM32F1xx Timers</b>
@ingroup STM32F1xx_defines
@version 1.0.0
@date 8 March 2013
@author @htmlonly &copy; @endhtmlonly 2011 Fergus Noble <fergusnoble@gmail.com>
LGPL License Terms @ref lgpl_license
*/
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2011 Fergus Noble <fergusnoble@gmail.com>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef LIBOPENCM3_TIMER_H
#define LIBOPENCM3_TIMER_H
#include <libopencm3/stm32/common/timer_common_all.h>
#endif

56
include/libopencm3/stm32/f2/timer.h
View File

@ -1,3 +1,17 @@
/** @defgroup timer_defines Timer Defines
@brief <b>libopencm3 Defined Constants and Types for the STM32F2xx Timers</b>
@ingroup STM32F2xx_defines
@version 1.0.0
@date 8 March 2013
@author @htmlonly &copy; @endhtmlonly 2011 Fergus Noble <fergusnoble@gmail.com>
LGPL License Terms @ref lgpl_license
*/
/*
* This file is part of the libopencm3 project.
*
@ -17,45 +31,9 @@
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef LIBOPENCM3_TIMER_F2_H
#define LIBOPENCM3_TIMER_F2_H
#ifndef LIBOPENCM3_TIMER_H
#define LIBOPENCM3_TIMER_H
#include <libopencm3/stm32/timer.h>
/*
* TIM2 and TIM5 are now 32bit and the following registers are now 32-bit wide:
* CNT, ARR, CCR1, CCR2, CCR3, CCR4
*/
/* Timer 2/5 option register (TIMx_OR) */
#define TIM_OR(tim_base) MMIO32(tim_base + 0x50)
#define TIM2_OR TIM_OR(TIM2)
#define TIM5_OR TIM_OR(TIM5)
/* --- TIM2_OR values ---------------------------------------------------- */
/* MOE: Main output enable */
#define TIM2_OR_ITR1_RMP_TIM8_TRGOU (0x0 << 10)
#define TIM2_OR_ITR1_RMP_PTP (0x1 << 10)
#define TIM2_OR_ITR1_RMP_OTG_FS_SOF (0x2 << 10)
#define TIM2_OR_ITR1_RMP_OTG_HS_SOF (0x3 << 10)
#define TIM2_OR_ITR1_RMP_MASK (0x3 << 10)
/* --- TIM5_OR values ---------------------------------------------------- */
/* MOE: Main output enable */
#define TIM5_OR_TI4_RMP_GPIO (0x0 << 6)
#define TIM5_OR_TI4_RMP_LSI (0x1 << 6)
#define TIM5_OR_TI4_RMP_LSE (0x2 << 6)
#define TIM5_OR_TI4_RMP_RTC (0x3 << 6)
#define TIM5_OR_TI4_RMP_MASK (0x3 << 6)
/* --- Function prototypes ------------------------------------------------- */
BEGIN_DECLS
void timer_set_option(u32 timer_peripheral, u32 option);
END_DECLS
#include <libopencm3/stm32/common/timer_common_f24.h>
#endif

56
include/libopencm3/stm32/f4/timer.h
View File

@ -1,3 +1,17 @@
/** @defgroup timer_defines Timer Defines
@brief <b>libopencm3 Defined Constants and Types for the STM32F4xx Timers</b>
@ingroup STM32F4xx_defines
@version 1.0.0
@date 8 March 2013
@author @htmlonly &copy; @endhtmlonly 2011 Fergus Noble <fergusnoble@gmail.com>
LGPL License Terms @ref lgpl_license
*/
/*
* This file is part of the libopencm3 project.
*
@ -17,45 +31,9 @@
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef LIBOPENCM3_TIMER_F4_H
#define LIBOPENCM3_TIMER_F4_H
#ifndef LIBOPENCM3_TIMER_H
#define LIBOPENCM3_TIMER_H
#include <libopencm3/stm32/timer.h>
/*
* TIM2 and TIM5 are now 32bit and the following registers are now 32-bit wide:
* CNT, ARR, CCR1, CCR2, CCR3, CCR4
*/
/* Timer 2/5 option register (TIMx_OR) */
#define TIM_OR(tim_base) MMIO32(tim_base + 0x50)
#define TIM2_OR TIM_OR(TIM2)
#define TIM5_OR TIM_OR(TIM5)
/* --- TIM2_OR values ---------------------------------------------------- */
/* MOE: Main output enable */
#define TIM2_OR_ITR1_RMP_TIM8_TRGOU (0x0 << 10)
#define TIM2_OR_ITR1_RMP_PTP (0x1 << 10)
#define TIM2_OR_ITR1_RMP_OTG_FS_SOF (0x2 << 10)
#define TIM2_OR_ITR1_RMP_OTG_HS_SOF (0x3 << 10)
#define TIM2_OR_ITR1_RMP_MASK (0x3 << 10)
/* --- TIM5_OR values ---------------------------------------------------- */
/* MOE: Main output enable */
#define TIM5_OR_TI4_RMP_GPIO (0x0 << 6)
#define TIM5_OR_TI4_RMP_LSI (0x1 << 6)
#define TIM5_OR_TI4_RMP_LSE (0x2 << 6)
#define TIM5_OR_TI4_RMP_RTC (0x3 << 6)
#define TIM5_OR_TI4_RMP_MASK (0x3 << 6)
/* --- Function prototypes ------------------------------------------------- */
BEGIN_DECLS
void timer_set_option(u32 timer_peripheral, u32 option);
END_DECLS
#include <libopencm3/stm32/common/timer_common_f24.h>
#endif

2
include/libopencm3/stm32/l1/pwr.h
View File

@ -54,7 +54,7 @@ LGPL License Terms @ref lgpl_license
/* VOS[12:11]: Regulator voltage scaling output selection */
#define PWR_CR_VOS_LSB 11
/** @defgroup pwr_vos Voltage Scaling Output level selection
@ingroup STM32F_pwr_defines
@ingroup pwr_defines
@{*/
#define PWR_CR_VOS_RANGE1 (0x1 << PWR_CR_VOS_LSB)

88
include/libopencm3/stm32/l1/timer.h Normal file
View File

@ -0,0 +1,88 @@
/** @defgroup timer_defines Timer Defines
@brief <b>libopencm3 Defined Constants and Types for the STM32L1xx Timers</b>
@ingroup STM32L1xx_defines
@version 1.0.0
@date 8 March 2013
@author @htmlonly &copy; @endhtmlonly 2011 Fergus Noble <fergusnoble@gmail.com>
LGPL License Terms @ref lgpl_license
*/
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2011 Fergus Noble <fergusnoble@gmail.com>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef LIBOPENCM3_TIMER_H
#define LIBOPENCM3_TIMER_H
#include <libopencm3/stm32/common/timer_common_all.h>
/*
* TIM2 and TIM5 are now 32bit and the following registers are now 32-bit wide:
* CNT, ARR, CCR1, CCR2, CCR3, CCR4
*/
/* Timer 2/3 option register (TIMx_OR) */
#define TIM_OR(tim_base) MMIO32(tim_base + 0x50)
#define TIM2_OR TIM_OR(TIM2)
#define TIM3_OR TIM_OR(TIM3)
/* --- TIMx_OR values ---------------------------------------------------- */
/* ITR1_RMP */
/****************************************************************************/
/** @defgroup tim2_opt_trigger_remap TIM2_OR Timer 2 Option Register Internal Trigger 1 Remap
@ingroup timer_defines
@{*/
/** Internal Trigger 1 remapped to timer 10 output compare */
#define TIM2_OR_ITR1_RMP_TIM10_OC (0x0 << 0)
/** Internal Trigger 1 remapped to timer 5 TGO */
#define TIM2_OR_ITR1_RMP_TIM5_TGO (0x1 << 0)
/**@}*/
#define TIM3_OR_ITR1_RMP_MASK (0x1 << 0)
/* --- TIMx_OR values ---------------------------------------------------- */
/* ITR2_RMP */
/****************************************************************************/
/** @defgroup tim3_opt_trigger_remap TIM3_OR Timer 3 Option Register Internal Trigger 2 Remap
@ingroup timer_defines
@{*/
/** Internal Trigger 1 remapped to timer 11 output compare */
#define TIM3_OR_ITR2_RMP_TIM8_TRGOU (0x0 << 0)
/** Internal Trigger 1 remapped to timer 5 TGO */
#define TIM3_OR_ITR2_RMP_PTP (0x1 << 0)
/**@}*/
#define TIM3_OR_ITR2_RMP_MASK (0x1 << 0)
/* --- Function prototypes ------------------------------------------------- */
BEGIN_DECLS
void timer_set_option(u32 timer_peripheral, u32 option);
END_DECLS
#endif

1102
include/libopencm3/stm32/timer.h
View File

File diff suppressed because it is too large Load Diff

51
lib/stm32/timer.c → lib/stm32/common/timer_common_all.c
View File

@ -1,14 +1,9 @@
/** @defgroup STM32F1xx-timer-file Timers
@ingroup STM32F1xx
@brief <b>libopencm3 STM32 Timers</b>
@version 1.0.0
/** @addtogroup timer_file
@author @htmlonly &copy; @endhtmlonly 2010 Edward Cheeseman <evbuilder@users.sourceforge.org>
@author @htmlonly &copy; @endhtmlonly 2011 Stephen Caudle <scaudle@doceme.com>
@date 18 August 2012
@section tim_common Notes for All Timers
This library supports the General Purpose and Advanced Control Timers for
the STM32 series of ARM Cortex Microcontrollers by ST Microelectronics.
@ -66,6 +61,7 @@ push-pull outputs where the PWM output will appear.
@todo input capture example
*/
/*
* This file is part of the libopencm3 project.
*
@ -97,23 +93,9 @@ push-pull outputs where the PWM output will appear.
/**@{*/
#include <libopencm3/stm32/timer.h>
#include <libopencm3/stm32/rcc.h>
#if defined(STM32F1)
#define ADVANCED_TIMERS (defined (TIM1_BASE) || defined(TIM8_BASE))
# include <libopencm3/stm32/f1/rcc.h>
#elif defined(STM32F2)
#define ADVANCED_TIMERS (defined (TIM1_BASE) || defined(TIM8_BASE))
# include <libopencm3/stm32/f2/timer.h>
# include <libopencm3/stm32/f2/rcc.h>
#elif defined(STM32F4)
#define ADVANCED_TIMERS (defined (TIM1_BASE) || defined(TIM8_BASE))
# include <libopencm3/stm32/f4/timer.h>
# include <libopencm3/stm32/f4/rcc.h>
#elif defined(STM32L1)
# include <libopencm3/stm32/l1/rcc.h>
#else
# error "stm32 family not defined."
#endif
/*---------------------------------------------------------------------------*/
/** @brief Reset a Timer.
@ -1836,29 +1818,6 @@ u32 timer_get_counter(u32 timer_peripheral)
return TIM_CNT(timer_peripheral);
}
/*---------------------------------------------------------------------------*/
/** @brief Set Timer Option
Set timer options register on TIM2 or TIM5, used for oscillator calibration
on TIM5 and trigger remapping on TIM2. Only available on F4 and F2.
@param[in] timer_peripheral Unsigned int32. Timer register address base
@returns Unsigned int32. Option flags.
*/
#if (defined(STM32F4) || defined(STM32F2))
void timer_set_option(u32 timer_peripheral, u32 option)
{
if (timer_peripheral == TIM2) {
TIM_OR(timer_peripheral) &= ~TIM2_OR_ITR1_RMP_MASK;
TIM_OR(timer_peripheral) |= option;
} else if (timer_peripheral == TIM5) {
TIM_OR(timer_peripheral) &= ~TIM5_OR_TI4_RMP_MASK;
TIM_OR(timer_peripheral) |= option;
}
}
#endif
/*---------------------------------------------------------------------------*/
/** @brief Set Counter

51
lib/stm32/common/timer_common_f24.c Normal file
View File

@ -0,0 +1,51 @@
/** @addtogroup timer_file
*/
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2010 Edward Cheeseman <evbuilder@users.sourceforge.org>
* Copyright (C) 2011 Stephen Caudle <scaudle@doceme.com>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
/**@{*/
#include <libopencm3/stm32/timer.h>
/*---------------------------------------------------------------------------*/
/** @brief Set Timer Option
Set timer options register on TIM2 or TIM5, used for trigger remapping on TIM2,
and similarly for TIM5 for oscillator calibration purposes.
@param[in] timer_peripheral Unsigned int32. Timer register address base
@returns Unsigned int32. Option flags TIM2: @ref tim2_opt_trigger_remap, TIM5: @ref tim5_opt_trigger_remap.
*/
void timer_set_option(u32 timer_peripheral, u32 option)
{
if (timer_peripheral == TIM2) {
TIM_OR(timer_peripheral) &= ~TIM2_OR_ITR1_RMP_MASK;
TIM_OR(timer_peripheral) |= option;
} else if (timer_peripheral == TIM5) {
TIM_OR(timer_peripheral) &= ~TIM5_OR_TI4_RMP_MASK;
TIM_OR(timer_peripheral) |= option;
}
}
/**@}*/

18
lib/stm32/f1/Makefile
View File

@ -32,13 +32,17 @@ CFLAGS = -Os -g \
-ffunction-sections -fdata-sections -MD -DSTM32F1
# ARFLAGS = rcsv
ARFLAGS = rcs
OBJS = rcc.o gpio.o adc.o flash.o rtc.o dma.o exti.o ethernet.o \
usb_f103.o usb.o usb_control.o usb_standard.o can.o \
timer.o usb_f107.o desig.o pwr_common_all.o \
usb_fx07_common.o \
gpio_common_all.o dma_common_f13.o spi_common_all.o \
dac_common_all.o usart_common_all.o iwdg_common_all.o \
i2c_common_all.o crc_common_all.o
OBJS = adc.o can.o desig.o exti.o ethernet.o flash.o gpio.o \
rcc.o rtc.o
OBJS += crc_common_all.o dac_common_all.o dma_common_f13.o \
gpio_common_all.o i2c_common_all.o iwdg_common_all.o \
pwr_common_all.o spi_common_all.o \
timer_common_all.o usart_common_all.o
OBJS += usb.o usb_control.o usb_standard.o usb_f103.o usb_f107.o \
usb_fx07_common.o
VPATH += ../../usb:../:../../cm3:../common

40
lib/stm32/f1/timer.c Normal file
View File

@ -0,0 +1,40 @@
/* This file is used for documentation purposes. It does not need
to be compiled. All source code is in the common area.
If there is any device specific code required it can be included here,
in which case this file must be added to the compile list. */
/** @defgroup timer_file Timers
@ingroup STM32F1xx
@brief <b>libopencm3 STM32F1xx Timers</b>
@version 1.0.0
@date 18 August 2012
*/
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2010 Edward Cheeseman <evbuilder@users.sourceforge.org>
* Copyright (C) 2011 Stephen Caudle <scaudle@doceme.com>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#include <libopencm3/stm32/timer.h>
#include <libopencm3/stm32/common/timer_common_all.h>

16
lib/stm32/f2/Makefile
View File

@ -19,8 +19,8 @@
LIBNAME = libopencm3_stm32f2
PREFIX ?= arm-none-eabi
# PREFIX ?= arm-elf
PREFIX ?= arm-none-eabi
# PREFIX ?= arm-elf
CC = $(PREFIX)-gcc
AR = $(PREFIX)-ar
CFLAGS = -Os -g \
@ -32,11 +32,13 @@ CFLAGS = -Os -g \
-ffunction-sections -fdata-sections -MD -DSTM32F2
# ARFLAGS = rcsv
ARFLAGS = rcs
OBJS = rcc.o gpio.o flash.o exti2.o timer.o \
gpio_common_all.o gpio_common_f24.o dma_common_f24.o spi_common_all.o \
dac_common_all.o usart_common_all.o iwdg_common_all.o i2c_common_all.o \
crc_common_all.o \
rtc_common_bcd.o
OBJS = gpio.o exti2.o flash.o rcc.o
OBJS += crc_common_all.o dac_common_all.o dma_common_f24.o \
gpio_common_all.o gpio_common_f24.o i2c_common_all.o \
iwdg_common_all.o rtc_common_bcd.o spi_common_all.o \
timer_common_all.o timer_common_f24.o usart_common_all.o
VPATH += ../../usb:../:../../cm3:../common

40
lib/stm32/f2/timer.c Normal file
View File

@ -0,0 +1,40 @@
/* This file is used for documentation purposes. It does not need
to be compiled. All source code is in the common area.
If there is any device specific code required it can be included here,
in which case this file must be added to the compile list. */
/** @defgroup timer_file Timers
@ingroup STM32F2xx
@brief <b>libopencm3 STM32F2xx Timers</b>
@version 1.0.0
@date 18 August 2012
*/
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2010 Edward Cheeseman <evbuilder@users.sourceforge.org>
* Copyright (C) 2011 Stephen Caudle <scaudle@doceme.com>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#include <libopencm3/stm32/timer.h>
#include <libopencm3/stm32/common/timer_common_f24.h>

25
lib/stm32/f4/Makefile
View File

@ -19,8 +19,8 @@
LIBNAME = libopencm3_stm32f4
PREFIX ?= arm-none-eabi
# PREFIX ?= arm-elf
PREFIX ?= arm-none-eabi
# PREFIX ?= arm-elf
CC = $(PREFIX)-gcc
AR = $(PREFIX)-ar
CFLAGS = -Os -g \
@ -33,16 +33,17 @@ CFLAGS = -Os -g \
-ffunction-sections -fdata-sections -MD -DSTM32F4
# ARFLAGS = rcsv
ARFLAGS = rcs
OBJS = rcc.o gpio.o flash.o exti2.o pwr.o timer.o \
usb.o usb_standard.o usb_control.o usb_fx07_common.o usb_f107.o \
usb_f207.o adc.o dma.o \
pwr_common_all.o \
gpio_common_all.o gpio_common_f24.o dma_common_f24.o spi_common_all.o \
dac_common_all.o usart_common_all.o iwdg_common_all.o i2c_common_all.o \
crc_common_all.o \
rtc_common_bcd.o \
rtc.o \
can.o
OBJS = adc.o can.o gpio.o exti2.o flash.o pwr.o rcc.o
OBJS += crc_common_all.o dac_common_all.o dma_common_f24.o \
gpio_common_all.o gpio_common_f24.o i2c_common_all.o \
iwdg_common_all.o pwr_common_all.o rtc_common_bcd.o \
spi_common_all.o timer_common_all.o timer_common_f24.o \
usart_common_all.o
OBJS += usb.o usb_standard.o usb_control.o usb_fx07_common.o \
usb_f107.o usb_f207.o
VPATH += ../../usb:../:../../cm3:../common

40
lib/stm32/f4/timer.c Normal file
View File

@ -0,0 +1,40 @@
/* This file is used for documentation purposes. It does not need
to be compiled. All source code is in the common area.
If there is any device specific code required it can be included here,
in which case this file must be added to the compile list. */
/** @defgroup timer_file Timers
@ingroup STM32F4xx
@brief <b>libopencm3 STM32F4xx Timers</b>
@version 1.0.0
@date 18 August 2012
*/
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2010 Edward Cheeseman <evbuilder@users.sourceforge.org>
* Copyright (C) 2011 Stephen Caudle <scaudle@doceme.com>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
#include <libopencm3/stm32/timer.h>
#include <libopencm3/stm32/common/timer_common_f24.h>

10
lib/stm32/l1/Makefile
View File

@ -32,11 +32,11 @@ CFLAGS = -Os -g \
-ffunction-sections -fdata-sections -MD -DSTM32L1
# ARFLAGS = rcsv
ARFLAGS = rcs
OBJS = rcc.o desig.o crc.o usart.o exti2.o flash.o timer.o
OBJS += gpio_common_all.o gpio_common_f24.o spi_common_all.o crc_common_all.o
OBJS += dac_common_all.o usart_common_all.o iwdg_common_all.o i2c_common_all.o
OBJS += pwr_common_all.o pwr.o
OBJS += rtc_common_bcd.o
OBJS = crc.o desig.o exti2.o flash.o rcc.o usart.o
OBJS += crc_common_all.o dac_common_all.o gpio_common_all.o
OBJS += gpio_common_f24.o i2c_common_all.o iwdg_common_all.o
OBJS += pwr_common_all.o pwr.o rtc_common_bcd.o
OBJS += spi_common_all.o timer_common_all.o usart_common_all.o
VPATH += ../../usb:../:../../cm3:../common

59
lib/stm32/l1/timer.c Normal file
View File

@ -0,0 +1,59 @@
/** @defgroup timer_file Timers
@ingroup STM32L1xx
@brief <b>libopencm3 STM32L1xx Timers</b>
@version 1.0.0
@date 18 August 2012
*/
/*
* This file is part of the libopencm3 project.
*
* Copyright (C) 2010 Edward Cheeseman <evbuilder@users.sourceforge.org>
* Copyright (C) 2011 Stephen Caudle <scaudle@doceme.com>
*
* This library is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This library is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this library. If not, see <http://www.gnu.org/licenses/>.
*/
/**@{*/
#include <libopencm3/stm32/timer.h>
#include <libopencm3/stm32/common/timer_common_all.h>
/*---------------------------------------------------------------------------*/
/** @brief Set Timer Option
Set timer options register on TIM2 or TIM3, used for trigger remapping.
@param[in] timer_peripheral Unsigned int32. Timer register address base
@returns Unsigned int32. Option flags TIM2: @ref tim2_opt_trigger_remap, TIM3: @ref tim3_opt_trigger_remap.
*/
void timer_set_option(u32 timer_peripheral, u32 option)
{
if (timer_peripheral == TIM2) {
TIM_OR(timer_peripheral) &= ~TIM2_OR_ITR1_RMP_MASK;
TIM_OR(timer_peripheral) |= option;
} else if (timer_peripheral == TIM3) {
TIM_OR(timer_peripheral) &= ~TIM3_OR_ITR2_RMP_MASK;
TIM_OR(timer_peripheral) |= option;
}
}
/**@}*/