2014-01-14 12:28:48 +00:00
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/** @addtogroup rcc_defines
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*
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* @author @htmlonly © @endhtmlonly 2013
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* Frantisek Burian <BuFran@seznam.cz>
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*/
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2013-07-02 18:04:51 +00:00
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/*
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* This file is part of the libopencm3 project.
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*
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* Copyright (C) 2013 Frantisek Burian <BuFran@seznam.cz>
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*
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* This library is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with this library. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* THIS FILE SHOULD NOT BE INCLUDED DIRECTLY, BUT ONLY VIA RCC.H
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* The order of header inclusion is important. rcc.h defines the device
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* specific enumerations before including this header file.
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*/
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/** @cond */
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#ifdef LIBOPENCM3_RCC_H
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/** @endcond */
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#ifndef LIBOPENCM3_RCC_COMMON_ALL_H
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#define LIBOPENCM3_RCC_COMMON_ALL_H
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2014-02-20 22:34:19 +00:00
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2014-01-14 12:28:48 +00:00
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/**@{*/
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2014-01-03 00:07:30 +00:00
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2013-07-02 18:04:51 +00:00
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BEGIN_DECLS
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void rcc_peripheral_enable_clock(volatile uint32_t *reg, uint32_t en);
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void rcc_peripheral_disable_clock(volatile uint32_t *reg, uint32_t en);
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void rcc_peripheral_reset(volatile uint32_t *reg, uint32_t reset);
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void rcc_peripheral_clear_reset(volatile uint32_t *reg, uint32_t clear_reset);
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void rcc_periph_clock_enable(enum rcc_periph_clken clken);
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void rcc_periph_clock_disable(enum rcc_periph_clken clken);
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void rcc_periph_reset_pulse(enum rcc_periph_rst rst);
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void rcc_periph_reset_hold(enum rcc_periph_rst rst);
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void rcc_periph_reset_release(enum rcc_periph_rst rst);
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2015-01-12 04:44:41 +00:00
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void rcc_set_mco(uint32_t mcosrc);
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2017-05-01 22:56:28 +00:00
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void rcc_osc_bypass_enable(enum rcc_osc osc);
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void rcc_osc_bypass_disable(enum rcc_osc osc);
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2015-01-12 04:44:41 +00:00
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2016-08-16 17:57:57 +00:00
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/**
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* Is the given oscillator ready?
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* @param osc Oscillator ID
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* @return true if the hardware indicates the oscillator is ready.
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*/
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bool rcc_is_osc_ready(enum rcc_osc osc);
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2016-08-16 17:46:50 +00:00
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/**
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* Wait for Oscillator Ready.
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* Block until the hardware indicates that the Oscillator is ready.
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* @param osc Oscillator ID
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*/
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void rcc_wait_for_osc_ready(enum rcc_osc osc);
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2020-03-06 05:57:21 +00:00
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/**
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* This will return the divisor 1/2/4/8/16/64/128/256/512 which is set as a
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* 4-bit value, typically used for hpre and other prescalers.
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* @param div_val Masked and shifted divider value from register (e.g. RCC_CFGR)
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*/
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uint16_t rcc_get_div_from_hpre(uint8_t div_val);
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2013-07-02 18:04:51 +00:00
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END_DECLS
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2014-01-14 12:28:48 +00:00
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/**@}*/
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2013-07-02 18:04:51 +00:00
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#endif
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2014-01-14 12:28:48 +00:00
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/** @cond */
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#else
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#warning "rcc_common_all.h should not be included explicitly, only via rcc.h"
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2013-07-02 18:04:51 +00:00
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#endif
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2014-01-14 12:28:48 +00:00
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/** @endcond */
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