make it build against sysmobts v2 APO 0.1, 0.2, 1.0, 2.0, 2.1, 2.2, 2.4 and 3.0
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255343db4b
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8debeeeeea
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@ -270,6 +270,7 @@ const struct value_string femtobts_tch_pl_names[] = {
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};
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const struct value_string femtobts_clksrc_names[] = {
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#if SUPERFEMTO_API_VERSION >= SUPERFEMTO_API(2,1,0)
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{ SuperFemto_ClkSrcId_None, "None" },
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{ SuperFemto_ClkSrcId_Ocxo, "ocxo" },
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{ SuperFemto_ClkSrcId_Tcxo, "tcxo" },
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@ -279,6 +280,15 @@ const struct value_string femtobts_clksrc_names[] = {
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{ SuperFemto_ClkSrcId_Rx, "rx" },
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{ SuperFemto_ClkSrcId_Edge, "edge" },
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{ SuperFemto_ClkSrcId_NetList, "nwl" },
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#else
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{ SF_CLKSRC_NONE, "None" },
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{ SF_CLKSRC_OCXO, "ocxo" },
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{ SF_CLKSRC_TCXO, "tcxo" },
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{ SF_CLKSRC_EXT, "ext" },
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{ SF_CLKSRC_GPS, "gps" },
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{ SF_CLKSRC_TRX, "trx" },
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{ SF_CLKSRC_RX, "rx" },
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#endif
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{ 0, NULL }
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};
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@ -12,15 +12,6 @@
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//#define USE_L1_RTP_MODE /* Tell L1 to use RTP mode */
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#endif
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/* older header files don't have this */
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#ifndef SUPERFEMTO_API
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#define SUPERFEMTO_API(x,y,z) ((x << 16) + (y << 8) + z)
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#endif
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#ifndef SUPERFEMTO_API_VERSION
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#define SUPERFEMTO_API_VERSION SUPERFEMTO_API(2,2,0)
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#endif
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/*
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* Depending on the firmware version either GsmL1_Prim_t or SuperFemto_Prim_t
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* is the bigger struct. For earlier firmware versions the GsmL1_Prim_t was the
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@ -35,6 +26,19 @@ enum l1prim_type {
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L1P_T_IND,
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};
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#if SUPERFEMTO_API_VERSION < SUPERFEMTO_API(2,1,0)
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enum uperfemto_clk_src {
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SF_CLKSRC_NONE = 0,
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SF_CLKSRC_OCXO = 1,
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SF_CLKSRC_TCXO = 2,
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SF_CLKSRC_EXT = 3,
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SF_CLKSRC_GPS = 4,
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SF_CLKSRC_TRX = 5,
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SF_CLKSRC_RX = 6,
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SF_CLKSRC_NL = 7,
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};
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#endif
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const enum l1prim_type femtobts_l1prim_type[GsmL1_PrimId_NUM];
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const struct value_string femtobts_l1prim_names[GsmL1_PrimId_NUM+1];
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const GsmL1_PrimId_t femtobts_l1prim_req2conf[GsmL1_PrimId_NUM];
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@ -967,17 +967,27 @@ int l1if_activate_rf(struct femtol1_hdl *hdl, int on)
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#ifdef HW_SYSMOBTS_V1
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sysp->u.activateRfReq.u12ClkVc = hdl->clk_cal;
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#else
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#if SUPERFEMTO_API_VERSION >= SUPERFEMTO_API(0,2,0)
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sysp->u.activateRfReq.timing.u8TimSrc = 1; /* Master */
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#endif /* 0.2.0 */
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sysp->u.activateRfReq.msgq.u8UseTchMsgq = 0;
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sysp->u.activateRfReq.msgq.u8UsePdtchMsgq = pcu_direct;
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/* Use clock from OCXO or whatever source is configured */
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#if SUPERFEMTO_API_VERSION < SUPERFEMTO_API(2,1,0)
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sysp->u.activateRfReq.rfTrx.u8ClkSrc = hdl->clk_src;
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#else
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sysp->u.activateRfReq.rfTrx.clkSrc = hdl->clk_src;
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#endif /* 2.1.0 */
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sysp->u.activateRfReq.rfTrx.iClkCor = hdl->clk_cal;
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#if SUPERFEMTO_API_VERSION < SUPERFEMTO_API(2,4,0)
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// sysp->u.activateRfReq.rfRx.clkSrc = hdl->clk_src;
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// sysp->u.activateRfReq.rfRx.iClkCor = hdl->clk_cal;
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#if SUPERFEMTO_API_VERSION < SUPERFEMTO_API(2,1,0)
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sysp->u.activateRfReq.rfRx.u8ClkSrc = hdl->clk_src;
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#else
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sysp->u.activateRfReq.rfRx.clkSrc = hdl->clk_src;
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#endif /* 2.1.0 */
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sysp->u.activateRfReq.rfRx.iClkCor = hdl->clk_cal;
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#endif /* API 2.4.0 */
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#endif
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#endif /* !HW_SYSMOBTS_V1 */
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} else {
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sysp->id = SuperFemto_PrimId_DeactivateRfReq;
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}
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@ -1154,7 +1164,11 @@ struct femtol1_hdl *l1if_open(void *priv)
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fl1h->priv = priv;
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fl1h->clk_cal = 0;
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/* default clock source: OCXO */
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#if SUPERFEMTO_API_VERSION >= SUPERFEMTO_API(2,1,0)
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fl1h->clk_src = SuperFemto_ClkSrcId_Ocxo;
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#else
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fl1h->clk_src = SF_CLKSRC_OCXO;
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#endif
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rc = l1if_transport_open(MQ_SYS_WRITE, fl1h);
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if (rc < 0) {
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