From 8debeeeeeaaafebf25f703b1fa9dc730cdb4c833 Mon Sep 17 00:00:00 2001
From: Harald Welte <laforge@gnumonks.org>
Date: Sat, 27 Oct 2012 18:06:03 +0200
Subject: [PATCH] make it build against sysmobts v2 APO 0.1, 0.2, 1.0, 2.0,
 2.1, 2.2, 2.4 and 3.0

---
 src/osmo-bts-sysmo/femtobts.c | 10 ++++++++++
 src/osmo-bts-sysmo/femtobts.h | 22 +++++++++++++---------
 src/osmo-bts-sysmo/l1_if.c    | 20 +++++++++++++++++---
 3 files changed, 40 insertions(+), 12 deletions(-)

diff --git a/src/osmo-bts-sysmo/femtobts.c b/src/osmo-bts-sysmo/femtobts.c
index 9e0ba085f..e13fb3559 100644
--- a/src/osmo-bts-sysmo/femtobts.c
+++ b/src/osmo-bts-sysmo/femtobts.c
@@ -270,6 +270,7 @@ const struct value_string femtobts_tch_pl_names[] = {
 };
 
 const struct value_string femtobts_clksrc_names[] = {
+#if SUPERFEMTO_API_VERSION >= SUPERFEMTO_API(2,1,0)
 	{ SuperFemto_ClkSrcId_None,	"None" },
 	{ SuperFemto_ClkSrcId_Ocxo,	"ocxo" },
 	{ SuperFemto_ClkSrcId_Tcxo,	"tcxo" },
@@ -279,6 +280,15 @@ const struct value_string femtobts_clksrc_names[] = {
 	{ SuperFemto_ClkSrcId_Rx,	"rx" },
 	{ SuperFemto_ClkSrcId_Edge,	"edge" },
 	{ SuperFemto_ClkSrcId_NetList,	"nwl" },
+#else
+	{ SF_CLKSRC_NONE,       "None" },
+	{ SF_CLKSRC_OCXO,       "ocxo" },
+	{ SF_CLKSRC_TCXO,       "tcxo" },
+	{ SF_CLKSRC_EXT,        "ext" },
+	{ SF_CLKSRC_GPS,        "gps" },
+	{ SF_CLKSRC_TRX,        "trx" },
+	{ SF_CLKSRC_RX,         "rx" },
+#endif
 	{ 0, NULL }
 };
 
diff --git a/src/osmo-bts-sysmo/femtobts.h b/src/osmo-bts-sysmo/femtobts.h
index a880562df..0e6332970 100644
--- a/src/osmo-bts-sysmo/femtobts.h
+++ b/src/osmo-bts-sysmo/femtobts.h
@@ -12,15 +12,6 @@
 //#define USE_L1_RTP_MODE		/* Tell L1 to use RTP mode */
 #endif
 
-/* older header files don't have this */
-#ifndef SUPERFEMTO_API
-#define SUPERFEMTO_API(x,y,z)	((x << 16) + (y << 8) + z)
-#endif
-
-#ifndef SUPERFEMTO_API_VERSION
-#define SUPERFEMTO_API_VERSION SUPERFEMTO_API(2,2,0)
-#endif
-
 /*
  * Depending on the firmware version either GsmL1_Prim_t or SuperFemto_Prim_t
  * is the bigger struct. For earlier firmware versions the GsmL1_Prim_t was the
@@ -35,6 +26,19 @@ enum l1prim_type {
 	L1P_T_IND,
 };
 
+#if SUPERFEMTO_API_VERSION < SUPERFEMTO_API(2,1,0)
+enum uperfemto_clk_src {
+	SF_CLKSRC_NONE  = 0,
+	SF_CLKSRC_OCXO  = 1,
+	SF_CLKSRC_TCXO  = 2,
+	SF_CLKSRC_EXT   = 3,
+	SF_CLKSRC_GPS   = 4,
+	SF_CLKSRC_TRX   = 5,
+	SF_CLKSRC_RX    = 6,
+	SF_CLKSRC_NL    = 7,
+};
+#endif
+
 const enum l1prim_type femtobts_l1prim_type[GsmL1_PrimId_NUM];
 const struct value_string femtobts_l1prim_names[GsmL1_PrimId_NUM+1];
 const GsmL1_PrimId_t femtobts_l1prim_req2conf[GsmL1_PrimId_NUM];
diff --git a/src/osmo-bts-sysmo/l1_if.c b/src/osmo-bts-sysmo/l1_if.c
index 415b29954..97b205278 100644
--- a/src/osmo-bts-sysmo/l1_if.c
+++ b/src/osmo-bts-sysmo/l1_if.c
@@ -967,17 +967,27 @@ int l1if_activate_rf(struct femtol1_hdl *hdl, int on)
 #ifdef HW_SYSMOBTS_V1
 		sysp->u.activateRfReq.u12ClkVc = hdl->clk_cal;
 #else
+#if SUPERFEMTO_API_VERSION >= SUPERFEMTO_API(0,2,0)
 		sysp->u.activateRfReq.timing.u8TimSrc = 1; /* Master */
+#endif /* 0.2.0 */
 		sysp->u.activateRfReq.msgq.u8UseTchMsgq = 0;
 		sysp->u.activateRfReq.msgq.u8UsePdtchMsgq = pcu_direct;
 		/* Use clock from OCXO or whatever source is configured */
+#if SUPERFEMTO_API_VERSION < SUPERFEMTO_API(2,1,0)
+		sysp->u.activateRfReq.rfTrx.u8ClkSrc = hdl->clk_src;
+#else
 		sysp->u.activateRfReq.rfTrx.clkSrc = hdl->clk_src;
+#endif /* 2.1.0 */
 		sysp->u.activateRfReq.rfTrx.iClkCor = hdl->clk_cal;
 #if SUPERFEMTO_API_VERSION < SUPERFEMTO_API(2,4,0)
-//		sysp->u.activateRfReq.rfRx.clkSrc = hdl->clk_src;
-//		sysp->u.activateRfReq.rfRx.iClkCor = hdl->clk_cal;
+#if SUPERFEMTO_API_VERSION < SUPERFEMTO_API(2,1,0)
+		sysp->u.activateRfReq.rfRx.u8ClkSrc = hdl->clk_src;
+#else
+		sysp->u.activateRfReq.rfRx.clkSrc = hdl->clk_src;
+#endif /* 2.1.0 */
+		sysp->u.activateRfReq.rfRx.iClkCor = hdl->clk_cal;
 #endif /* API 2.4.0 */
-#endif
+#endif /* !HW_SYSMOBTS_V1 */
 	} else {
 		sysp->id = SuperFemto_PrimId_DeactivateRfReq;
 	}
@@ -1154,7 +1164,11 @@ struct femtol1_hdl *l1if_open(void *priv)
 	fl1h->priv = priv;
 	fl1h->clk_cal = 0;
 	/* default clock source: OCXO */
+#if SUPERFEMTO_API_VERSION >= SUPERFEMTO_API(2,1,0)
 	fl1h->clk_src = SuperFemto_ClkSrcId_Ocxo;
+#else
+	fl1h->clk_src = SF_CLKSRC_OCXO;
+#endif
 
 	rc = l1if_transport_open(MQ_SYS_WRITE, fl1h);
 	if (rc < 0) {