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169 Commits

Author SHA1 Message Date
blueswir1 2cade6a3f6 Support for address masking
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4882 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-17 12:53:05 +00:00
blueswir1 48bbf11bcb Fix r4641 (invalid token "=<" in a preprocessor expression)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4859 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-08 18:35:02 +00:00
ths 551bd27f22 Convert remaining __builtin_expect to likely/unlikely, by Jan Kiszka.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4840 c046a42c-6fe2-441c-8c8c-71466251a162
2008-07-03 17:57:36 +00:00
ths bf20dc076b Spelling fixes, spotted by Stuart Brady.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4809 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-30 17:22:19 +00:00
pbrook 2e70f6efa8 Add instruction counter.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4799 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-29 01:03:05 +00:00
ths b5dc7732e1 More efficient target register / TC accesses.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4794 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-27 10:02:35 +00:00
edgar_igl 1b1a38b0aa CRIS: Emulate NMIs.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4719 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-09 23:18:06 +00:00
pbrook d597536303 Multithreaded locking fixes.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4692 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-07 20:50:51 +00:00
edgar_igl 7e15e60388 CRIS: Add the P flag to the tb dependent flags.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4685 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-06 11:24:33 +00:00
bellard db620f46a8 reworked SVM interrupt handling logic - fixed vmrun EIP saved value - reworked cr8 handling - added CPUState.hflags2
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4662 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-04 17:02:19 +00:00
balrog 5c49b363dc Restore ARM signal handler compilation on glibc < 2.5 (Blue Swirl).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4641 c046a42c-6fe2-441c-8c8c-71466251a162
2008-06-02 01:01:18 +00:00
blueswir1 75d0187a52 Remove unused (for now) reg_REGWPTR (original patch by Glauber Costa)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4617 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-29 16:38:41 +00:00
bellard 872929aa59 SVM rework
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4605 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-28 16:16:54 +00:00
bellard 0ac087f1f3 removed unused code
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4598 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-27 21:18:39 +00:00
edgar_igl 3878e2c9b2 CRIS: Re-add the X flag to the tb flags, it allows for better code generation and is practially always cleared.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4597 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-27 21:15:56 +00:00
blueswir1 f2bc7e7fa1 Move non-op functions from op_helper.c to helper.c and vice versa.
Rearrange interrupt handling to match other targets.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4590 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-27 17:35:30 +00:00
blueswir1 6b4c11cd8e Fix Sparc32 compilation broken by r4484
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4499 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-19 17:20:01 +00:00
blueswir1 c9e1e2b0ac Fix Sparc64 host signal handling
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4484 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-18 06:40:16 +00:00
blueswir1 572a9d4a88 Improved workaround for the annoying glibc global register mangling bug
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4465 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-17 07:38:10 +00:00
edgar_igl 21b20814ed Always process real timers regardless of singlestep mode (Jason Wessel).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4462 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-15 19:54:00 +00:00
blueswir1 7d55170268 Fix compilation on Sparc host, implement ld and st
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4457 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-14 19:22:05 +00:00
edgar_igl cf1d97f074 CRIS: Improve TLB management and handle delayslots at page boundaries.
* Dont flush the entire qemu tlb when the $pid changes. Instead we go through
  the guests TLB and choose entries that need to be flushed.
* Add env->dslot and handle delayslots at pageboundaries.
* Remove some unused code.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4450 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-13 10:59:14 +00:00
bellard 5d97559d89 use new helper name
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4448 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-12 22:05:33 +00:00
bellard eba01623ab the double/triple fault handling was not tested in user mode.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4435 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-12 12:04:40 +00:00
bellard 7cb69cae20 initial global prologue/epilogue implementation
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4407 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-10 10:55:51 +00:00
blueswir1 4d7a0880ca Fix compiler warnings in common files
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4405 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-10 10:14:22 +00:00
edgar_igl 60897d369f Debugger single step without interrupts (Jason Wessel).
This patch allows the qemu backend debugger to single step an
instruction without running the hardware interrupts.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4391 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-09 08:25:14 +00:00
edgar_igl 17a594d737 CRIS: Remove X flag from tb flags.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4378 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-07 15:27:14 +00:00
balrog 4eee57f57e Fix signal handler compilation on __arm__.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4359 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-06 14:47:19 +00:00
blueswir1 b5fc09ae52 Fix crash due to invalid env->current_tb (Adam Lackorzynski, Paul Brook, me)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4317 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-04 06:38:18 +00:00
edgar_igl 5d1d98ec4d CRIS: Reduce the number of tb dependent flags.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4305 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-03 08:35:16 +00:00
edgar_igl b41f7df018 CRIS updates:
* Support both the I and D MMUs and improve the accuracy of the MMU model.
* Handle the automatic user/kernel stack pointer switching when leaving or entering user mode.
* Move the CCS evaluation into helper funcs.
* Make sure user-mode cannot change flags only writeable in kernel mode.
* More conversion of the translator into TCG.
* Handle exceptions while in a delayslot.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4299 c046a42c-6fe2-441c-8c8c-71466251a162
2008-05-02 22:16:17 +00:00
aurel32 474ea8494a x86: Introduce CPU_INTERRUPT_NMI
(Jan Kiszka)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4205 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-13 16:08:15 +00:00
aurel32 f54b3f920f HPPA (PA-RISC) host support
(Stuart Brady)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4199 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-12 20:14:54 +00:00
aurel32 968c74da19 Fix compiler warnings
(Stefan Weil)


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4188 c046a42c-6fe2-441c-8c8c-71466251a162
2008-04-11 04:55:17 +00:00
edgar_igl e62b5b133b * Add a model of the ETRAX interrupt controller.
* Clean up the interrupt handling a bit.
* Connect some NOR flash to the test board.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4055 c046a42c-6fe2-441c-8c8c-71466251a162
2008-03-14 01:04:24 +00:00
bellard bce61846b1 reverted -translation option support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3947 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-01 22:18:51 +00:00
bellard 57fec1fee9 use the TCG code generator
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3944 c046a42c-6fe2-441c-8c8c-71466251a162
2008-02-01 10:50:11 +00:00
ths 40a2e657a5 Add option to disable TB cache, by Herve Poussineau.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3930 c046a42c-6fe2-441c-8c8c-71466251a162
2008-01-23 19:01:12 +00:00
blueswir1 66f1cdbde4 Partial fix to Sparc32 Linux host global register mangling problem
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3806 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-11 19:39:25 +00:00
blueswir1 d07bde88a5 Fix code generation buffer overflow reported by TeLeMan
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3805 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-11 19:35:45 +00:00
ths e96e2044a1 SH4: system emulator interrupt update, by Magnus Damm.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3762 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-02 06:18:24 +00:00
ths 823029f909 SH4 delay slot code update, by Magnus Damm.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3761 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-02 06:10:04 +00:00
pbrook 497ad68cd4 Fix TB chaining for exceptions.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3721 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-23 02:11:10 +00:00
bellard 6f12a2a6ea consistent types for cpu_x86_fsave and cpu_x86_frstor
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3621 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-11 22:16:56 +00:00
bellard 6dfd59d6a7 removed warning
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3617 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-11 20:14:28 +00:00
pbrook 9ee6e8bb85 ARMv7 support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3572 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-11 00:04:49 +00:00
bellard ec6338bac3 removed obsolete x86 code copy support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3551 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-08 14:25:03 +00:00
blueswir1 6d5f237a59 CPU specific boot mode (Robert Reif)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3542 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-07 17:03:37 +00:00
j_mayer 6ebbf39000 Replace is_user variable with mmu_idx in softmmu core,
allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
  and #ifdef TARGET_xxx in softmmu core functions.
Implement per target mmu modes definitions. As an example, add PowerPC
  hypervisor mode definition and Alpha executive and kernel modes definitions.
Optimize PowerPC case, precomputing mmu_idx when MSR register changes
  and using the same definition in code translation code.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-14 07:07:08 +00:00