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13 Commits

Author SHA1 Message Date
Avi Kivity 1eed09cb4a Remove io_index argument from cpu_register_io_memory()
The parameter is always zero except when registering the three internal
io regions (ROM, unassigned, notdirty).  Remove the parameter to reduce
the API's power, thus facilitating future change.

Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2009-06-16 15:18:37 -05:00
Paul Brook 5561650587 Include assert.h from qemu-common.h
Include assert.h from qemu-common.h and remove other direct uses.
cpu-all.h still need to include it because of the dyngen-exec.h hacks

Signed-off-by: Paul Brook <paul@codesourcery.com>
2009-05-13 20:54:26 +01:00
aliguori 487414f1cb hw: remove error handling from qemu_malloc() callers (Avi Kivity)
Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6529 c046a42c-6fe2-441c-8c8c-71466251a162
2009-02-05 22:06:05 +00:00
malc b1503cda1e Use the ARRAY_SIZE() macro where appropriate.
Change from v1:
  Avoid changing the existing coding style in certain files.

Signed-off-by: Stuart Brady <stuart.brady@gmail.com>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6120 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-22 20:33:55 +00:00
aurel32 b79e175259 SH4: kill a few warnings
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5938 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07 22:46:42 +00:00
balrog 5c16736a37 SH4: Eliminate P4 to A7 mangling (Takashi YOSHII).
Main purpose of this is to delete
       *physical = address & 0x1fffffff;
at target-sh4/helper.c:449, using new mmio rule introduced by #5849
This masking is a nice trick to realize P4/A7 duality of SH registers.
But, IMHO, it is logically wrong.

Most of SH4 cpu control registers in P4 area(0xfc000000...0xffffffff) have
one more address called A7 which is usually P4 address with upper 3bits masked.
This is an address only appears in TLB's physical address part.

Current code use trick writing drivers as if they are really in A7
(that's why you see many *_A7 in hw/sh*.c), and using translation P4 to A7.

Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp>
Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5935 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07 19:39:58 +00:00
balrog c6d86a33d3 sh4: Add IRL (4-bit encoded interrupt input) support (Takashi YOSHII).
This patch adds IRL(4bit encoded 15 level interrupt input) support
to SH using qemu_irq as a multi level (!=on/off) signal.

Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp>
Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5925 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07 18:49:57 +00:00
pbrook 8da3ff1809 Change MMIO callbacks to use offsets, not absolute addresses.
Signed-off-by: Paul Brook <paul@codesourcery.com>


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5849 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-01 18:59:50 +00:00
aurel32 4e7ed2d1d3 SH4: Switch serial emulation to qemu_irq
This patches makes SH serial emulation use qemu_irq in its interface.

        * hw/sh.h (sh_serial_init): Take qemu_irq, not intc_source.
        * hw/sh7750.c (sh7750_init): Adjust.
        * hw/sh_intc.c (sh_intc_set_irq): Don't assert or deassert
        irq more than once.
        * hw/sh_serial.c (sh_serial_state): Use qemu_irq, not intc_source.
        (sh_serial_clear_fifo, sh_serial_ioport_write)
        (sh_serial_receive_byte): Adjust.
        (sh_serial_init): Take qemu_irq, not intc_source.

(Vladimir Prus)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5769 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-21 21:06:51 +00:00
aurel32 96e2fc41a9 SH4: Use qemu_irq in timer emulation.
* hw/sh.h (tmu012_init): Accept qemu_irq, not intc_source.
        * hw/sh7750.c (sh7750_init): Pass qemu_irq to tmu012_init.
        * hw/sh_intc.c (sh_intc_set_irq): New.
        (sh_intc_init): Allocate irqs.
        * hw/sh_intc.h (struct intc_desc): New field irqs.
        * hw/sh_timer.c (sh_timer_state): Use qemu_irq, not intc_source.
        (sh_timer_update): Use qemu_set_irq, not sh_intc_toggle_source.
        (sh_timer_init, tmu012_init): Adjust.

(Vladimir Prus)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5768 c046a42c-6fe2-441c-8c8c-71466251a162
2008-11-21 21:06:42 +00:00
ths e96e2044a1 SH4: system emulator interrupt update, by Magnus Damm.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3762 c046a42c-6fe2-441c-8c8c-71466251a162
2007-12-02 06:18:24 +00:00
pbrook 87ecb68bdf Break up vl.h.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
2007-11-17 17:14:51 +00:00
balrog 80f515e636 sh775x interrupt controller by Magnus Damm.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3327 c046a42c-6fe2-441c-8c8c-71466251a162
2007-10-04 21:53:55 +00:00