add workaround for E4K gap between 325-350 MHz
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@ -445,7 +445,9 @@ static int e4k_band_set(struct e4k_state *e4k, enum e4k_band band)
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e4k_reg_write(e4k, E4K_REG_BIAS, 0);
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break;
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}
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/* workaround: if we don't reset this register before writing to it,
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* we get a gap between 325-350 MHz */
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rc = e4k_reg_set_mask(e4k, E4K_REG_SYNTH1, 0x06, 0);
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rc = e4k_reg_set_mask(e4k, E4K_REG_SYNTH1, 0x06, band << 1);
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if (rc >= 0)
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e4k->band = band;
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