mirror of https://gerrit.osmocom.org/libusrp
539 lines
12 KiB
C++
539 lines
12 KiB
C++
//
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// Copyright 2008,2009 Free Software Foundation, Inc.
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//
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// This file is part of GNU Radio
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//
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// GNU Radio is free software; you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation; either asversion 3, or (at your option)
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// any later version.
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//
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// GNU Radio is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with GNU Radio; see the file COPYING. If not, write to
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// the Free Software Foundation, Inc., 51 Franklin Street,
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// Boston, MA 02110-1301, USA.
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <usrp/db_wbxng.h>
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#include "db_wbxng_adf4350.h"
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#include <db_base_impl.h>
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#include <stdio.h>
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#ifdef HAVE_TIME_H
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#include <ctime>
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#endif
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// d'board i/o pin defs
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// Tx and Rx have shared defs, but different i/o regs
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#define ENABLE_5 (1 << 7) // enables 5.0V power supply
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#define ENABLE_33 (1 << 6) // enables 3.3V supply
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//#define RX_TXN (1 << 15) // Tx only: T/R antenna switch for TX/RX port
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//#define RX2_RX1N (1 << 15) // Rx only: antenna switch between RX2 and TX/RX port
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#define RX_TXN ((1 << 5)|(1 << 15)) // Tx only: T/R antenna switch for TX/RX port
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#define RX2_RX1N ((1 << 5)|(1 << 15)) // Rx only: antenna switch between RX2 and TX/RX port
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#define RXBB_EN (1 << 4)
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#define TXMOD_EN (1 << 4)
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#define PLL_CE (1 << 3)
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#define PLL_PDBRF (1 << 2)
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#define PLL_MUXOUT (1 << 1)
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#define PLL_LOCK_DETECT (1 << 0)
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// RX Attenuator constants
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#define ATTN_SHIFT 8
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#define ATTN_MASK (63 << ATTN_SHIFT)
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wbxng_base::wbxng_base(usrp_basic_sptr _usrp, int which)
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: db_base(_usrp, which)
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{
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/*
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@param usrp: instance of usrp.source_c
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@param which: which side: 0 or 1 corresponding to side A or B respectively
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@type which: int
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*/
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usrp()->_write_oe(d_which, 0, 0xffff); // turn off all outputs
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d_first = true;
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d_spi_format = SPI_FMT_MSB | SPI_FMT_HDR_0;
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_enable_refclk(false); // disable refclk
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set_auto_tr(false);
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}
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wbxng_base::~wbxng_base()
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{
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}
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int
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wbxng_base::_refclk_divisor()
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{
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return 1;
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}
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struct freq_result_t
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wbxng_base::set_freq(double freq)
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{
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/*
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@returns (ok, actual_baseband_freq) where:
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ok is True or False and indicates success or failure,
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actual_baseband_freq is the RF frequency that corresponds to DC in the IF.
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*/
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// clamp freq
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freq_t int_freq = freq_t(std::max(freq_min(), std::min(freq, freq_max())));
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bool ok = d_common->_set_freq(int_freq*2, _refclk_freq());
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_write_spi(d_common->compute_register(5));
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_write_spi(d_common->compute_register(4));
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_write_spi(d_common->compute_register(3));
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/* load involved registers */
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_write_spi(d_common->compute_register(2));
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_write_spi(d_common->compute_register(1));
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_write_spi(d_common->compute_register(0));
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double freq_result = (double) d_common->_get_freq(_refclk_freq())/2.0;
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//ok &= _get_locked();
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struct freq_result_t args = {ok, freq_result};
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/* Wait before reading Lock Detect*/
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timespec t;
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t.tv_sec = 0;
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t.tv_nsec = 10000000;
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nanosleep(&t, NULL);
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//fprintf(stderr,"Setting WBXNG frequency, requested %d, obtained %f, lock_detect %d\n",
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// int_freq, freq_result, d_common->_get_locked());
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// FIXME
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// Offsetting the LO helps get the Tx carrier leakage out of the way.
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// This also ensures that on Rx, we're not getting hosed by the
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// FPGA's DC removal loop's time constant. We were seeing a
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// problem when running with discontinuous transmission.
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// Offsetting the LO made the problem go away.
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//freq += d_lo_offset;
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return args;
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}
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bool
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wbxng_base::_set_pga(float pga_gain)
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{
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if(d_which == 0) {
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usrp()->set_pga(0, pga_gain);
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usrp()->set_pga(1, pga_gain);
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}
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else {
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usrp()->set_pga(2, pga_gain);
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usrp()->set_pga(3, pga_gain);
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}
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return true;
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}
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bool
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wbxng_base::is_quadrature()
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{
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/*
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Return True if this board requires both I & Q analog channels.
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This bit of info is useful when setting up the USRP Rx mux register.
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*/
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return true;
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}
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double
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wbxng_base::freq_min()
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{
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return (double) d_common->_get_min_freq()/2.0;
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}
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double
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wbxng_base::freq_max()
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{
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return (double) d_common->_get_max_freq()/2.0;
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}
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bool
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wbxng_base::_get_locked(void)
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{
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return usrp()->read_io(d_which) & PLL_LOCK_DETECT;
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}
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void
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wbxng_base::_write_spi(std::string data)
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{
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usrp()->_write_spi(0, d_spi_enable, d_spi_format, data);
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}
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// ----------------------------------------------------------------
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db_wbxng_tx::db_wbxng_tx(usrp_basic_sptr _usrp, int which)
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: wbxng_base(_usrp, which)
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{
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/*
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@param usrp: instance of usrp.sink_c
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@param which: 0 or 1 corresponding to side TX_A or TX_B respectively.
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*/
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if(which == 0) {
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d_spi_enable = SPI_ENABLE_TX_A;
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}
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else {
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d_spi_enable = SPI_ENABLE_TX_B;
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}
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d_common = boost::shared_ptr<adf4350> (new adf4350());
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/* Initialize the registers. */
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_write_spi(d_common->compute_register(5));
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_write_spi(d_common->compute_register(4));
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_write_spi(d_common->compute_register(3));
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_write_spi(d_common->compute_register(2));
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_write_spi(d_common->compute_register(1));
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_write_spi(d_common->compute_register(0));
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// power up the transmit side, but don't enable the mixer
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usrp()->_write_oe(d_which,(PLL_CE|PLL_PDBRF|RX_TXN|TXMOD_EN|ENABLE_33|ENABLE_5), (PLL_CE|PLL_PDBRF|RX_TXN|TXMOD_EN|ENABLE_33|ENABLE_5));
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usrp()->write_io(d_which, (PLL_CE|RX_TXN|ENABLE_33|ENABLE_5), (PLL_CE|PLL_PDBRF|RX_TXN|ENABLE_33|ENABLE_5));
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//set_lo_offset(4e6);
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// Disable VCO/PLL
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//d_common->_enable(true);
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usrp()->write_io(d_which, (PLL_PDBRF), (PLL_PDBRF));
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set_gain(gain_min()); // initialize gain
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}
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db_wbxng_tx::~db_wbxng_tx()
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{
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shutdown();
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}
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void
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db_wbxng_tx::shutdown()
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{
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// fprintf(stderr, "db_wbxng_tx::shutdown d_is_shutdown = %d\n", d_is_shutdown);
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if (!d_is_shutdown){
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d_is_shutdown = true;
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// do whatever there is to do to shutdown
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// Disable VCO/PLL
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//d_common->_enable(false);
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usrp()->write_io(d_which, 0, (PLL_PDBRF));
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// Power down and leave the T/R switch in the R position
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usrp()->write_io(d_which, (RX_TXN), (PLL_CE|PLL_PDBRF|RX_TXN|ENABLE_33|ENABLE_5));
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/*
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_write_control(_compute_control_reg());
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*/
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_enable_refclk(false); // turn off refclk
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set_auto_tr(false);
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}
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}
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bool
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db_wbxng_tx::set_auto_tr(bool on)
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{
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bool ok = true;
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if(on) {
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ok &= set_atr_mask (RX_TXN | TXMOD_EN);
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ok &= set_atr_txval(0 | TXMOD_EN);
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ok &= set_atr_rxval(RX_TXN);
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}
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else {
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ok &= set_atr_mask (0);
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ok &= set_atr_txval(0);
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ok &= set_atr_rxval(0);
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}
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return ok;
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}
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bool
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db_wbxng_tx::set_enable(bool on)
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{
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/*
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Enable transmitter if on is true
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*/
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int v;
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int mask = RX_TXN | TXMOD_EN;
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if(on) {
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v = TXMOD_EN;
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// Enable VCO/PLL
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//d_common->_enable(true);
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}
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else {
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v = RX_TXN;
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// Disable VCO/PLL
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//d_common->_enable(false);
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}
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return usrp()->write_io(d_which, v, mask);
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}
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float
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db_wbxng_tx::gain_min()
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{
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return 0.0;
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}
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float
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db_wbxng_tx::gain_max()
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{
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return 25.0;
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}
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float
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db_wbxng_tx::gain_db_per_step()
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{
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return gain_max()/(1+(1.4-0.5)*4096/3.3);
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}
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bool
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db_wbxng_tx::set_gain(float gain)
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{
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/*
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Set the gain.
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@param gain: gain in decibels
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@returns True/False
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*/
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// clamp gain
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gain = std::max(gain_min(), std::min(gain, gain_max()));
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float pga_gain, agc_gain;
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float V_maxgain, V_mingain, V_fullscale, dac_value;
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float maxgain = gain_max();
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float mingain = gain_min();
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pga_gain = 0;
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agc_gain = gain;
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V_maxgain = 0.5;
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V_mingain = 1.4;
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V_fullscale = 3.3;
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dac_value = (agc_gain*(V_maxgain-V_mingain)/(maxgain-mingain) + V_mingain)*4096/V_fullscale;
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//fprintf(stderr, "TXGAIN: %f dB, Dac Code: %d, Voltage: %f\n", gain, int(dac_value), float((dac_value/4096.0)*V_fullscale));
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assert(dac_value>=0 && dac_value<4096);
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return (usrp()->write_aux_dac(d_which, 0, int(dac_value))
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&& _set_pga(usrp()->pga_max()));
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}
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/**************************************************************************/
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db_wbxng_rx::db_wbxng_rx(usrp_basic_sptr _usrp, int which)
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: wbxng_base(_usrp, which)
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{
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/*
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@param usrp: instance of usrp.source_c
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@param which: 0 or 1 corresponding to side RX_A or RX_B respectively.
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*/
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if(which == 0) {
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d_spi_enable = SPI_ENABLE_RX_A;
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}
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else {
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d_spi_enable = SPI_ENABLE_RX_B;
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}
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d_common = boost::shared_ptr<adf4350> (new adf4350());
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/* Initialize the registers. */
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_write_spi(d_common->compute_register(5));
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_write_spi(d_common->compute_register(4));
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_write_spi(d_common->compute_register(3));
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_write_spi(d_common->compute_register(2));
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_write_spi(d_common->compute_register(1));
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_write_spi(d_common->compute_register(0));
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usrp()->_write_oe(d_which, (PLL_CE|PLL_PDBRF|RX2_RX1N|RXBB_EN|ATTN_MASK|ENABLE_33|ENABLE_5), (PLL_CE|PLL_PDBRF|RX2_RX1N|RXBB_EN|ATTN_MASK|ENABLE_33|ENABLE_5));
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usrp()->write_io(d_which, (PLL_CE|RX2_RX1N|RXBB_EN|ENABLE_33|ENABLE_5), (PLL_CE|PLL_PDBRF|RX2_RX1N|RXBB_EN|ATTN_MASK|ENABLE_33|ENABLE_5));
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//fprintf(stderr,"Setting WBXNG RXBB on");
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// Enable VCO/PLL
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//d_common->_enable(true);
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usrp()->write_io(d_which, (PLL_PDBRF), (PLL_PDBRF));
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// set up for RX on TX/RX port
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select_rx_antenna("TX/RX");
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bypass_adc_buffers(true);
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/*
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set_lo_offset(-4e6);
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*/
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set_gain(gain_min()); // initialize gain
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}
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db_wbxng_rx::~db_wbxng_rx()
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{
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shutdown();
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}
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void
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db_wbxng_rx::shutdown()
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{
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// fprintf(stderr, "db_wbxng_rx::shutdown d_is_shutdown = %d\n", d_is_shutdown);
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if (!d_is_shutdown){
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d_is_shutdown = true;
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// do whatever there is to do to shutdown
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// Power down VCO/PLL
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//d_common->_enable(false);
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usrp()->write_io(d_which, 0, (PLL_PDBRF));
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// fprintf(stderr, "db_wbxng_rx::shutdown before _write_control\n");
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//_write_control(_compute_control_reg());
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// fprintf(stderr, "db_wbxng_rx::shutdown before _enable_refclk\n");
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_enable_refclk(false); // turn off refclk
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// fprintf(stderr, "db_wbxng_rx::shutdown before set_auto_tr\n");
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set_auto_tr(false);
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// Power down
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usrp()->write_io(d_which, 0, (PLL_CE|PLL_PDBRF|RX2_RX1N|RXBB_EN|ATTN_MASK|ENABLE_33|ENABLE_5));
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// fprintf(stderr, "db_wbxng_rx::shutdown after set_auto_tr\n");
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}
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}
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bool
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db_wbxng_rx::set_auto_tr(bool on)
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{
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bool ok = true;
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if(on) {
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ok &= set_atr_mask (RXBB_EN|RX2_RX1N);
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ok &= set_atr_txval( 0|RX2_RX1N);
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ok &= set_atr_rxval(RXBB_EN| 0);
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}
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else {
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ok &= set_atr_mask (0);
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ok &= set_atr_txval(0);
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ok &= set_atr_rxval(0);
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}
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return true;
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}
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bool
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db_wbxng_rx::select_rx_antenna(int which_antenna)
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{
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/*
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Specify which antenna port to use for reception.
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@param which_antenna: either 'TX/RX' or 'RX2'
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*/
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if(which_antenna == 0) {
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usrp()->write_io(d_which, 0,RX2_RX1N);
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}
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else if(which_antenna == 1) {
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usrp()->write_io(d_which, RX2_RX1N, RX2_RX1N);
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}
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else {
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return false;
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}
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return true;
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}
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bool
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db_wbxng_rx::select_rx_antenna(const std::string &which_antenna)
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{
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/*
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Specify which antenna port to use for reception.
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@param which_antenna: either 'TX/RX' or 'RX2'
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*/
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if(which_antenna == "TX/RX") {
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usrp()->write_io(d_which, 0, RX2_RX1N);
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}
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else if(which_antenna == "RX2") {
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usrp()->write_io(d_which, RX2_RX1N, RX2_RX1N);
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}
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else {
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return false;
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}
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return true;
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}
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bool
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db_wbxng_rx::set_gain(float gain)
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{
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/*
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Set the gain.
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@param gain: gain in decibels
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@returns True/False
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*/
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// clamp gain
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gain = std::max(gain_min(), std::min(gain, gain_max()));
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float pga_gain, agc_gain;
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float maxgain = gain_max() - usrp()->pga_max();
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if(gain > maxgain) {
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pga_gain = gain-maxgain;
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assert(pga_gain <= usrp()->pga_max());
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agc_gain = maxgain;
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}
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else {
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pga_gain = 0;
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agc_gain = gain;
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}
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return _set_attn(maxgain-agc_gain) && _set_pga(int(pga_gain));
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}
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bool
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db_wbxng_rx::_set_attn(float attn)
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{
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int attn_code = int(floor(attn/0.5));
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unsigned int iobits = (~attn_code) << ATTN_SHIFT;
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//fprintf(stderr, "Attenuation: %f dB, Code: %d, IO Bits %x, Mask: %x \n", attn, attn_code, iobits & ATTN_MASK, ATTN_MASK);
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return usrp()->write_io(d_which, iobits, ATTN_MASK);
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}
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float
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db_wbxng_rx::gain_min()
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|
{
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return usrp()->pga_min();
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}
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|
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float
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|
db_wbxng_rx::gain_max()
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|
{
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|
return usrp()->pga_max()+30.5;
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}
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|
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float
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|
db_wbxng_rx::gain_db_per_step()
|
|
{
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|
return 0.05;
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}
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|
|
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bool
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|
db_wbxng_rx::i_and_q_swapped()
|
|
{
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|
return false;
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}
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