mirror of https://gerrit.osmocom.org/libusrp
418 lines
12 KiB
C++
418 lines
12 KiB
C++
//
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// Copyright 2010 Free Software Foundation, Inc.
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//
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// This file is part of GNU Radio
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//
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// GNU Radio is free software; you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation; either asversion 3, or (at your option)
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// any later version.
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//
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// GNU Radio is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with GNU Radio; see the file COPYING. If not, write to
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// the Free Software Foundation, Inc., 51 Franklin Street,
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// Boston, MA 02110-1301, USA.
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <usrp/db_bitshark_rx.h>
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#include <db_base_impl.h>
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#include <cmath>
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#include <cstdio>
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#include <string.h>
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#include <stdint.h>
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/* Note: Thie general structure of this file is based on the db_dbsrx.cc
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codebase for the dbsrx daughterboard. */
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/* The following defines specify the address map provided by the
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Bitshark card. These registers are all accessed over I2C. */
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#define RF_CENTER_FREQ_REG 0x00
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#define RF_CHAN_FILTER_BW_REG 0x01
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#define RF_GAIN_REG 0x02
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#define BB_GAIN_REG 0x03
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#define ADF4350_REG 0x10
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#define SKY73202_REG 0x11
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#define CLOCK_SCHEME_REG 0x20
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/* The following table lists the registers provided by the BURX board that
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are accessible over I2C:
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--------------------------------------------------------
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|RegAddr: 0x00-RF Center Freq register |
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|4-bytes 0x00|
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|4-byte unsigned RF center freq (in KHz)|
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|RegAddr: 0x01-RF channel filter bandwidth register |
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|4-bytes 0x00|
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|4-byte unsigned RF channel filter bw (in KHz)|
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|RegAddr: 0x02-RF gain register |
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|7-bytes 0x00|
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|1-byte signed RF gain (in dB)|
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|RegAddr: 0x03-Baseband gain register |
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|4-bytes 0x00|
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|4-byte signed baseband filter gain (in dB)|
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|RegAddr: 0x10-ADF4350 register |
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|4-bytes 0x00|
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|4-byte ADF4350 register value (actual ADF4350 reg addr embedded
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within 4-byte value)|
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|RegAddr: 0x11-SKY73202 register |
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|5-bytes 0x00|
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|1-byte reg 0 of SKY73202 |
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|1-byte reg 1 of SKY73202 |
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|1-byte reg 2 of SKY73202 |
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|RegAddr: 0x20-Clock Scheme |
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|3-bytes 0x00|
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|1-byte indicating clocking scheme:
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-0x00 -> BURX local TCXO off, BURX accepts ref clock from
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USRP (freq of USRP's ref clock specified in bytes 2-5)
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-0x01 -> BURX local TCXO on, BURX uses its local TCXO as its ref
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clock, TCXO signal output for use by USRP |
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|4-byte USRP ref clock freq in hz (only needed if byte 1 set to 0x00) |
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---------------------------------------------------------------------------
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As an example, lets say the client wants to set an RF center freq of
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1000 MHz. In KHz, this translates to 1000000 (resolution is only down to
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steps of 1 KHz), which is 0x000F4240 in hex. So the complete 9-byte I2C
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sequence that the client should send is as follows:
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byte 0: 0x00-register 0x00 is the target of the write operation
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bytes 1-4: 0x00 (padding)
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byte 5: 0x40 (LSB of the 1000000 KHz value, in hex)
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byte 6: 0x42
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byte 7: 0x0F
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byte 8: 0x00 (MSB of the 1000000 KHz value, in hex)
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If using the usrper cmd-line application on a PC, this sequence would
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be sent as follows (assuming that the BURX is in slot A):
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# usrper i2c_write 0x47 000000000040420F00
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How about another example...lets say the client wants to setup the clock
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scheme to use scheme #1 where the 26 MHz TCXO on the BURX board is enabled,
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and is provided to the USRP. 26 MHz (i.e. 26 million), in hex, is 0x18CBA80.
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So the complete 9-byte I2C sequence that the client should send is as follows:
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byte 0: 0x20-register 0x20 is the target of the write operation
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bytes 1-3: 0x00 (padding)
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byte 4: 0x01 (indicating that clock scheme #1 is wanted)
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byte 5: 0x80 (LSB of the BURX ref clk freq)
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byte 6: 0xBA
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byte 7: 0x8C
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byte 8: 0x01 (MSB of the BURX ref clk freq)
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To enable the BURX local ref clk, which will also make it available on the
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on-board U.FL connector as a source for the USRP, a user can also use
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the usrper cmd-line application on a PC. The following sequence would
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be sent (assuming that the BURX is in slot A):
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# usrper i2c_write 0x47 200000000180BA8C01
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*/
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#define NUM_BYTES_IN_I2C_CMD 9
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/*****************************************************************************/
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db_bitshark_rx::db_bitshark_rx(usrp_basic_sptr _usrp, int which)
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: db_base(_usrp, which)
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{
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// Control Bitshark receiver USRP daughterboard.
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//
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// @param usrp: instance of usrp.source_c
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// @param which: which side: 0, 1 corresponding to RX_A or RX_B respectively
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// turn off all outputs
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usrp()->_write_oe(d_which, 0, 0xffff);
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if (which == 0)
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{
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d_i2c_addr = 0x47;
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}
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else
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{
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d_i2c_addr = 0x45;
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}
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// initialize gain
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set_gain((gain_min() + gain_max()) / 2.0);
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// by default, assume we're using the USRPs clock as the ref clk,
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// so setup the clock scheme and frequency. If the user wants
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// to use the Bitshark's TCXO, the clock scheme should be set
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// to 1, the freq should be set to 26000000, and a top-level
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// 'make' and 'make install' needs to be executed. In addition,
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// a U.FL to SMA cable needs to connect J6 on the Bitshark to
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// the external clk input on the USRP
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set_clock_scheme(0,64000000);
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set_bw(8e6); // Default IF bandwidth to match USRP1 max host bandwidth
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bypass_adc_buffers(true);
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}
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db_bitshark_rx::~db_bitshark_rx()
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{
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shutdown();
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}
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/************ Private Functions **********************/
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void
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db_bitshark_rx::_set_pga(int pga_gain)
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{
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assert(pga_gain>=0 && pga_gain<=20);
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if(d_which == 0)
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{
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usrp()->set_pga (0, pga_gain);
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usrp()->set_pga (1, pga_gain);
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}
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else
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{
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usrp()->set_pga (2, pga_gain);
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usrp()->set_pga (3, pga_gain);
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}
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}
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/************ Public Functions **********************/
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void
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db_bitshark_rx::shutdown()
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{
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if (!d_is_shutdown)
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{
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d_is_shutdown = true;
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}
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}
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bool
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db_bitshark_rx::set_bw (float bw)
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{
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std::vector<int> args(NUM_BYTES_IN_I2C_CMD,0);
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uint16_t rf_bw_in_khz = (uint16_t)(bw/1000.0);
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char val[4];
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bool result = false;
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uint8_t try_count = 0;
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memset(val,0x00,4);
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if (rf_bw_in_khz < 660 || rf_bw_in_khz > 56000)
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{
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fprintf(stderr, "db_bitshark_rx::set_bw: bw (=%d) must be between 660 KHz and 56 MHz inclusive\n", rf_bw_in_khz);
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return false;
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}
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//fprintf(stdout,"Setting bw: requested bw in khz is %d\r\n",rf_bw_in_khz);
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memcpy(val,&rf_bw_in_khz,4);
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args[0] = RF_CHAN_FILTER_BW_REG;
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args[5] = val[0];
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args[6] = val[1];
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args[7] = val[2];
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args[8] = val[3];
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while ((result != true) && (try_count < 3))
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{
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result=usrp()->write_i2c (d_i2c_addr, int_seq_to_str (args));
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try_count++;
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}
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if (result == false)
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{
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fprintf(stderr, "db_bitshark_rx:set_bw: giving up after 3 tries without success\n");
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}
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return result;
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}
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/* The gain referenced below is RF gain only. There are two independent
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gain settings at RF: a digital step attenuator (providing 0, -6, -12, and
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-18 dB of attenuation), and a second LNA (LNA2) that provides ~25 dB of
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gain (roughly...it actually depends on the RF freq). So combining these
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two stages can provide an overall gain range from 0 (which is mapped
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to -18 dB on the step attenuator + LNA2 turned off) to 42 (which is
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mapped to 0 dB on the step attenuator + LNA2 turned on).
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There could be better ways to map these, but this is sufficient for
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now. */
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float
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db_bitshark_rx::gain_min()
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{
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return 0;
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}
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float
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db_bitshark_rx::gain_max()
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{
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return 42;
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}
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float
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db_bitshark_rx::gain_db_per_step()
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{
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return 6;
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}
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bool
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db_bitshark_rx::set_gain(float gain)
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{
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// Set the gain.
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//
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// @param gain: RF gain in decibels, range of 0-42
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// @returns True/False
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std::vector<int> args(NUM_BYTES_IN_I2C_CMD,0);
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bool result = false;
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uint8_t try_count = 0;
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if (gain < gain_min() || gain > gain_max())
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{
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fprintf(stderr,"db_bitshark_rx::set_gain: gain (=%f) must be between %f and %f inclusive\n", gain,gain_min(),gain_max());
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return false;
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}
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//fprintf(stdout,"db_bitshark_rx::set_gain: requested gain of %f\r\n",gain);
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args[0] = RF_GAIN_REG;
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args[5] = (int)gain;
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while ((result != true) && (try_count < 3))
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{
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result=usrp()->write_i2c (d_i2c_addr, int_seq_to_str (args));
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try_count++;
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}
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if (result == false)
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{
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fprintf(stderr, "db_bitshark_rx:set_gain: giving up after 3 tries without success\n");
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}
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return result;
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}
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bool
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db_bitshark_rx::set_clock_scheme(uint8_t clock_scheme, uint32_t ref_clk_freq)
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{
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// Set the clock scheme for determining how the BURX
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// dboard receives its clock. Note: Ideally, the constructor for the
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// BURX board could simply call this method to set how it wants the
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// clock scheme configured. However, depending on the application
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// using the daughterboard, the constructor may run _after_ some
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// other portion of the application needs the FPGA. And if the
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// the clock source for the FPGA was the BURX's 26 MHz TCXO, we're in
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// a chicken-before-the-egg dilemna. So the solution is to leave
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// this function here for reference in case an app wants to use it,
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// and also give the user the ability to set the clock scheme through
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// the usrper cmd-line application (see example at the top of this
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// file).
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//
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// @param clock_scheme
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// @param ref_clk_freq in Hz
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// @returns True/False
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std::vector<int> args(NUM_BYTES_IN_I2C_CMD,0);
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bool result = false;
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uint8_t try_count = 0;
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char val[4];
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if (clock_scheme > 1)
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{
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fprintf(stderr,"db_bitshark_rx::set_clock_scheme: invalid scheme %d\n",clock_scheme);
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return false;
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}
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//fprintf(stdout,"db_bitshark_rx::set_clock_scheme: requested clock schem of %d with freq %d Hz \n",clock_scheme,ref_clk_freq);
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memcpy(val,&ref_clk_freq,4);
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args[0] = CLOCK_SCHEME_REG;
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args[4] = (int)clock_scheme;
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args[5] = val[0];
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args[6] = val[1];
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args[7] = val[2];
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args[8] = val[3];
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while ((result != true) && (try_count < 3))
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{
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result=usrp()->write_i2c (d_i2c_addr, int_seq_to_str (args));
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try_count++;
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}
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if (result == false)
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{
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fprintf(stderr, "db_bitshark_rx:set_clock_scheme: giving up after 3 tries without success\n");
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}
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return result;
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}
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double
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db_bitshark_rx::freq_min()
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{
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return 300e6;
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}
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double
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db_bitshark_rx::freq_max()
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{
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return 4e9;
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}
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struct freq_result_t
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db_bitshark_rx::set_freq(double freq)
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{
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// Set the frequency.
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//
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// @param freq: target RF frequency in Hz
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// @type freq: double
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//
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// @returns (ok, actual_baseband_freq) where:
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// ok is True or False and indicates success or failure,
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// actual_baseband_freq is RF frequency that corresponds to DC in the IF.
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std::vector<int> args(NUM_BYTES_IN_I2C_CMD,0);
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std::vector<int> bytes(2);
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char val[4];
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freq_result_t act_freq = {false, 0};
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uint32_t freq_in_khz = (uint32_t)(freq/1000.0);
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bool result = false;
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uint8_t try_count = 0;
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memset(val,0x00,4);
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if(!(freq>=freq_min() && freq<=freq_max()))
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{
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return act_freq;
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}
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//fprintf(stdout,"db_bitshark_rx::set_freq: requested freq is %d KHz\n",freq_in_khz);
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memcpy(val,&freq_in_khz,4);
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args[0] = RF_CENTER_FREQ_REG;
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args[5] = val[0];
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args[6] = val[1];
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args[7] = val[2];
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args[8] = val[3];
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while ((result != true) && (try_count < 3))
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{
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result=usrp()->write_i2c (d_i2c_addr, int_seq_to_str (args));
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try_count++;
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}
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if (result == false)
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{
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fprintf(stderr, "db_bitshark_rx:set_freq: giving up after 3 tries without success\n");
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}
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act_freq.ok = result;
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act_freq.baseband_freq = (double)freq;
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return act_freq;
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}
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bool
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db_bitshark_rx::is_quadrature()
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{
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// Return True if this board requires both I & Q analog channels.
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return true;
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}
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bool
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db_bitshark_rx::i_and_q_swapped()
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{
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// Returns True since our I and Q channels are swapped
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return true;
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}
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