mirror of https://gerrit.osmocom.org/libusrp
33 lines
1.6 KiB
Plaintext
Executable File
33 lines
1.6 KiB
Plaintext
Executable File
--Copyright (C) 1991-2003 Altera Corporation
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--Any megafunction design, and related netlist (encrypted or decrypted),
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--support information, device programming or simulation file, and any other
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--associated documentation or information provided by Altera or a partner
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--under Altera's Megafunction Partnership Program may be used only
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--to program PLD devices (but not masked PLD devices) from Altera. Any
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--other use of such megafunction design, netlist, support information,
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--device programming or simulation file, or any other related documentation
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--or information is prohibited for any other purpose, including, but not
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--limited to modification, reverse engineering, de-compiling, or use with
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--any other silicon devices, unless such use is explicitly licensed under
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--a separate agreement with Altera or a megafunction partner. Title to the
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--intellectual property, including patents, copyrights, trademarks, trade
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--secrets, or maskworks, embodied in any such megafunction design, netlist,
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--support information, device programming or simulation file, or any other
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--related documentation or information provided by Altera or a megafunction
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--partner, remains with Altera, the megafunction partner, or their respective
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--licensors. No other licenses, including any licenses needed under any third
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--party's intellectual property, are provided herein.
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component sub32
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PORT
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(
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dataa : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
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datab : IN STD_LOGIC_VECTOR (31 DOWNTO 0);
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clock : IN STD_LOGIC ;
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aclr : IN STD_LOGIC ;
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clken : IN STD_LOGIC ;
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result : OUT STD_LOGIC_VECTOR (31 DOWNTO 0)
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);
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end component;
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