This website requires JavaScript.
Explore
Redmine
Gerrit
Lists
Help
Register
Sign In
sdr
/
libusrp
mirror of
https://gerrit.osmocom.org/libusrp
Watch
8
Star
0
Fork
You've already forked libusrp
0
Code
Releases
Activity
acd46373d4
libusrp
/
fpga
/
megacells
/
bustri_inst.v
6 lines
101 B
Verilog
Executable File
Raw
Blame
History
bustri
bustri_inst
(
.
data
(
data_sig
)
,
.
enabledt
(
enabledt_sig
)
,
.
tridata
(
tridata_sig
)
)
;
View Git Blame
Copy Permalink