jcorgan 0e9c5a85cb Adds capability to independently delay the Auto T/R switching signal ... by a configurable number of clock ticks, to allow users to precisely align their T/R output with the pipeline delays in the transmitter. There are two new registers: FR_ATR_TX_DELAY (7'd2) FR_ATR_RX_DELAY (7'd3) ...and the corresponding db_base.py methods to set them: db_base.set_atr_tx_delay(clock_ticks) db_base.set_atr_rx_delay(clock_ticks) These methods are inherited by all the daughterboard objects so you can call them from your scripts as: subdev.set_atr_tx_delay(...) ...where 'subdev' represents the daughtercard object you're working with. The FPGA synthesis for the 2 RXHB, 2 TX case expands from 95% to 96%, with no additional synthesis messages or impact on timing. git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@5022 221aa14e-8319-0410-a670-987f0aec2ac5		2007-04-16 21:30:13 +00:00
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include	Adds capability to independently delay the Auto T/R switching signal	2007-04-16 21:30:13 +00:00
lib	Updated FSF address in all files. Fixes ticket:51	2006-09-13 21:30:04 +00:00
src	Fix for ticket:133, merged from eb/bsd 4322:4324.	2007-01-30 00:34:14 +00:00
Makefile.am	Updated FSF address in all files. Fixes ticket:51	2006-09-13 21:30:04 +00:00