libusrp/fpga/megacells/sub32_inst.v

9 lines
160 B
Verilog
Executable File

sub32 sub32_inst (
.dataa ( dataa_sig ),
.datab ( datab_sig ),
.clock ( clock_sig ),
.aclr ( aclr_sig ),
.clken ( clken_sig ),
.result ( result_sig )
);