retronetworking
/
osmo-e1-hardware
mirror of https://gerrit.osmocom.org/osmo-e1-hardware
13
0
Fork 0
Code Issues Projects Releases Wiki Activity
osmo-e1-hardware/gateware
History
Sylvain Munaut 4d9aea44ef gateware/cores: Update USB core 
Mostly to get firmware code improvement and fixes

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Change-Id: Ifacacd15f989aa51c04433cfb0bdaee7f848b658
 		2022-01-05 22:14:47 +01:00
..
build@f281c76d96 gateware/icE1usb: Add custom pre-pack optimizations to fix build 2020-10-09 13:40:16 +02:00
common gateware/common: Fix whitespace formatting in wb_epbuf 2020-10-28 00:43:13 +01:00
cores gateware/cores: Update USB core 2022-01-05 22:14:47 +01:00
doc gateware: Initial import of all common parts 2020-09-14 10:56:49 +02:00
e1-tracer gateware: Small tweaks and add option to ignore timing failure 2020-10-09 13:26:39 +02:00
icE1usb gateware/icE1usb: Add custom pre-pack optimizations to fix build 2020-10-09 13:40:16 +02:00
icE1usb-proto gateware: Small tweaks and add option to ignore timing failure 2020-10-09 13:26:39 +02:00
README.md gateware/README.md: Fix typo (CERL->CERN) 2020-11-04 15:54:25 +01:00

README.md

E1 related gateware

This directory contains the iCE40 gateware for various boards hosted in this repository.

Licensing

Most of the cores/HDL in here is licensed under one of the CERN OHL 2.0 license. See the doc/ subdirectory for the full license texts and refer to each file header to know the license applicable to each file.

Some files have been imported from other projects with compatible licenses. Refer to each file header for the proper copyright and license information.

The repository also includes submodules which have their own licensing and copyright terms.