389 lines
7.5 KiB
Verilog
389 lines
7.5 KiB
Verilog
/*
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* top.v
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*
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* vim: ts=4 sw=4
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*
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* Top-level for the icE1usb production boards
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*
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* Copyright (C) 2019-2020 Sylvain Munaut <tnt@246tNt.com>
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* SPDX-License-Identifier: CERN-OHL-S-2.0
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*/
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`default_nettype none
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module top (
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// E1 PHY
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input wire e1A_rx_hi_p,
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// input wire e1A_rx_hi_n,
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input wire e1A_rx_lo_p,
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// input wire e1A_rx_lo_n,
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output wire e1A_tx_hi,
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output wire e1A_tx_lo,
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input wire e1B_rx_hi_p,
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// input wire e1B_rx_hi_n,
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input wire e1B_rx_lo_p,
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// input wire e1B_rx_lo_n,
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output wire e1B_tx_hi,
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output wire e1B_tx_lo,
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output wire [1:0] e1_rx_bias,
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// USB
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inout wire usb_dp,
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inout wire usb_dn,
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output wire usb_pu,
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// Flash
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inout wire flash_mosi,
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inout wire flash_miso,
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inout wire flash_clk,
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inout wire flash_cs_n,
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// LED Shift register + Button input
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inout wire e1_led_rclk,
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// GPS
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output wire gps_reset_n,
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input wire gps_rx,
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output wire gps_tx,
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input wire gps_pps,
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// I2C
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inout wire i2c_sda,
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inout wire i2c_scl,
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// GPIOs
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inout wire [2:0] gpio,
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// Clock (30.72 MHz)
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input wire clk_in,
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output wire clk_tune_hi,
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output wire clk_tune_lo,
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// Debug UART
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input wire dbg_rx,
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output wire dbg_tx,
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// RGB LEDs
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output wire [2:0] rgb
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);
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localparam integer WB_N = 3;
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genvar i;
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// Signals
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// -------
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// Flash SPI internal signals
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wire flash_mosi_i, flash_miso_i, flash_clk_i;
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wire flash_mosi_o, flash_miso_o, flash_clk_o;
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wire flash_mosi_oe, flash_miso_oe, flash_clk_oe;
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wire flash_csn_o;
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// Peripheral wishbone
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wire [15:0] wb_addr;
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wire [31:0] wb_rdata [0:WB_N-1];
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wire [31:0] wb_wdata;
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wire [ 3:0] wb_wmsk;
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wire wb_we;
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wire [WB_N-1:0] wb_cyc;
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wire [WB_N-1:0] wb_ack;
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wire [(WB_N*32)-1:0] wb_rdata_flat;
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// Ticks
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wire [1:0] tick_e1_rx;
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wire [1:0] tick_e1_tx;
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wire tick_usb_sof;
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// I2C
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wire i2c_scl_oe;
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wire i2c_sda_oe;
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wire i2c_sda_i;
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// Led & Button
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wire [7:0] e1_led_state;
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wire e1_led_run;
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wire e1_led_active;
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wire spi_req;
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wire spi_gnt;
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wire [7:0] sr_val;
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wire sr_go;
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wire sr_rdy;
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wire btn_val;
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wire btn_stb;
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// Clocks / Reset
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wire rst_req;
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wire clk_sys;
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wire rst_sys;
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wire clk_48m;
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wire rst_48m;
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// SoC base
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// --------
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// Instance
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soc_base #(
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.WB_N(WB_N),
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.E1_N(2),
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.E1_UNIT_HAS_RX(2'b01),
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.E1_UNIT_HAS_TX(2'b01),
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.E1_LIU(0)
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) soc_I (
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.e1_rx_hi_p ({e1B_rx_hi_p, e1A_rx_hi_p}),
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// .e1_rx_hi_n ({e1B_rx_hi_n, e1A_rx_hi_n}),
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.e1_rx_lo_p ({e1B_rx_lo_p, e1A_rx_lo_p}),
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// .e1_rx_lo_n ({e1B_rx_lo_n, e1A_rx_lo_n}),
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.e1_tx_hi ({e1B_tx_hi, e1A_tx_hi }),
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.e1_tx_lo ({e1B_tx_lo, e1A_tx_lo }),
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.e1_rx_data (),
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.e1_rx_clk (),
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.e1_tx_data (),
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.e1_tx_clk (),
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.usb_dp (usb_dp),
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.usb_dn (usb_dn),
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.usb_pu (usb_pu),
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.flash_mosi_i (flash_mosi_i),
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.flash_mosi_o (flash_mosi_o),
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.flash_mosi_oe(flash_mosi_oe),
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.flash_miso_i (flash_miso_i),
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.flash_miso_o (flash_miso_o),
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.flash_miso_oe(flash_miso_oe),
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.flash_clk_i (flash_clk_i),
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.flash_clk_o (flash_clk_o),
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.flash_clk_oe (flash_clk_oe),
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.flash_csn_o (flash_csn_o),
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.dbg_rx (dbg_rx),
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.dbg_tx (dbg_tx),
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.rgb (rgb),
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.wb_m_addr (wb_addr),
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.wb_m_rdata (wb_rdata_flat),
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.wb_m_wdata (wb_wdata),
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.wb_m_wmsk (wb_wmsk),
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.wb_m_we (wb_we),
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.wb_m_cyc (wb_cyc),
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.wb_m_ack (wb_ack),
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.tick_e1_rx (tick_e1_rx),
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.tick_e1_tx (tick_e1_tx),
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.tick_usb_sof (tick_usb_sof),
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.clk_sys (clk_sys),
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.rst_sys (rst_sys),
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.clk_48m (clk_48m),
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.rst_48m (rst_48m)
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);
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// WB read data flattening
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for (i=0; i<WB_N; i=i+1)
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assign wb_rdata_flat[i*32+:32] = wb_rdata[i];
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// Dummy channel
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// -------------
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wire [1:0] e1_dummy;
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SB_IO #(
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.PIN_TYPE(6'b000000),
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.PULLUP(1'b0),
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.NEG_TRIGGER(1'b0),
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.IO_STANDARD("SB_LVDS_INPUT")
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) e1_dummy_rx_I[1:0] (
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.PACKAGE_PIN({e1B_rx_hi_p, e1B_rx_lo_p}),
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.LATCH_INPUT_VALUE(1'b0),
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.CLOCK_ENABLE(1'b1),
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.INPUT_CLK(clk_sys),
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.OUTPUT_CLK(1'b0),
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.OUTPUT_ENABLE(1'b0),
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.D_OUT_0(1'b0),
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.D_OUT_1(1'b0),
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.D_IN_0(e1_dummy),
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.D_IN_1()
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);
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SB_IO #(
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.PIN_TYPE(6'b010100),
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.PULLUP(1'b0),
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.NEG_TRIGGER(1'b0),
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.IO_STANDARD("SB_LVCMOS")
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) e1_dummy_tx_I[1:0] (
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.PACKAGE_PIN({e1B_tx_hi, e1B_tx_lo}),
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.LATCH_INPUT_VALUE(1'b0),
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.CLOCK_ENABLE(1'b1),
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.INPUT_CLK(1'b0),
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.OUTPUT_CLK(clk_sys),
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.OUTPUT_ENABLE(1'b0),
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.D_OUT_0(e1_dummy),
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.D_OUT_1(1'b0),
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.D_IN_0(),
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.D_IN_1()
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);
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// Misc [0]
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// ----
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misc misc_I (
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.e1_rx_bias (e1_rx_bias),
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.clk_tune_hi (clk_tune_hi),
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.clk_tune_lo (clk_tune_lo),
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.gps_reset_n (gps_reset_n),
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.gps_pps (gps_pps),
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.gpio (gpio),
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.e1_led_state (e1_led_state),
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.e1_led_run (e1_led_run),
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.e1_led_active (e1_led_active),
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.btn_val (btn_val),
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.btn_stb (btn_stb),
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.tick_e1_rx (tick_e1_rx),
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.tick_e1_tx (tick_e1_tx),
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.tick_usb_sof (tick_usb_sof),
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.rst_req (rst_req),
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.wb_addr (wb_addr[7:0]),
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.wb_rdata (wb_rdata[0]),
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.wb_wdata (wb_wdata),
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.wb_we (wb_we),
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.wb_cyc (wb_cyc[0]),
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.wb_ack (wb_ack[0]),
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.clk (clk_sys),
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.rst (rst_sys)
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);
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// GPS UART [1]
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// --------
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uart_wb #(
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.DIV_WIDTH(12),
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.DW(32)
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) gps_uart_I (
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.uart_tx (gps_tx),
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.uart_rx (gps_rx),
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.wb_addr (wb_addr[1:0]),
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.wb_rdata (wb_rdata[1]),
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.wb_wdata (wb_wdata),
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.wb_we (wb_we),
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.wb_cyc (wb_cyc[1]),
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.wb_ack (wb_ack[1]),
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.clk (clk_sys),
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.rst (rst_sys)
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);
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// I2C [2]
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// ---
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// Controller
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i2c_master_wb #(
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.DW(3),
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.FIFO_DEPTH(0)
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) i2c_I (
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.scl_oe (i2c_scl_oe),
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.sda_oe (i2c_sda_oe),
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.sda_i (i2c_sda_i),
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.wb_rdata(wb_rdata[2]),
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.wb_wdata(wb_wdata),
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.wb_we (wb_we),
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.wb_cyc (wb_cyc[2]),
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.wb_ack (wb_ack[2]),
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.ready (),
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.clk (clk_sys),
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.rst (rst_sys)
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);
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// IOBs
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SB_IO #(
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.PIN_TYPE(6'b110101),
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.PULLUP(1'b1),
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.IO_STANDARD("SB_LVCMOS")
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) i2c_scl_iob_I (
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.PACKAGE_PIN (i2c_scl),
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.OUTPUT_CLK (clk_sys),
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.OUTPUT_ENABLE(i2c_scl_oe),
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.D_OUT_0 (1'b0)
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);
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SB_IO #(
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.PIN_TYPE(6'b110100),
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.PULLUP(1'b1),
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.IO_STANDARD("SB_LVCMOS")
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) i2c_sda_iob_I (
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.PACKAGE_PIN (i2c_sda),
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.INPUT_CLK (clk_sys),
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.OUTPUT_CLK (clk_sys),
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.OUTPUT_ENABLE(i2c_sda_oe),
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.D_OUT_0 (1'b0),
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.D_IN_0 (i2c_sda_i)
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);
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// E1 LEDs & Button
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// ----------------
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// Blink pattern generator
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led_blinker blinker_I (
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.led_state(e1_led_state),
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.sr_val (sr_val),
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.sr_go (sr_go),
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.sr_rdy (sr_rdy),
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.clk (clk_sys),
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.rst (rst_sys)
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);
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// Interface
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sr_btn_if #(
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.TICK_LOG2_DIV(3)
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) spi_mux_I (
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.flash_mosi (flash_mosi),
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.flash_miso (flash_miso),
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.flash_clk (flash_clk),
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.flash_cs_n (flash_cs_n),
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.e1_led_rclk (e1_led_rclk),
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.spi_mosi_i (flash_mosi_i),
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.spi_mosi_o (flash_mosi_o),
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.spi_mosi_oe (flash_mosi_oe),
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.spi_miso_i (flash_miso_i),
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.spi_miso_o (flash_miso_o),
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.spi_miso_oe (flash_miso_oe),
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.spi_clk_i (flash_clk_i),
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.spi_clk_o (flash_clk_o),
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.spi_clk_oe (flash_clk_oe),
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.spi_csn_o (flash_csn_o),
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.spi_csn_oe (1'b1),
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.spi_req (spi_req),
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.spi_gnt (spi_gnt),
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.sr_val (sr_val),
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.sr_go (sr_go),
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.sr_rdy (sr_rdy),
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.btn_val (btn_val),
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.btn_stb (btn_stb),
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.clk (clk_sys),
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.rst (rst_sys)
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);
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assign spi_req = ~e1_led_run;
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assign e1_led_active = ~spi_gnt;
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// Clock / Reset
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// -------------
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sysmgr sys_mgr_I (
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.clk_in (clk_in),
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.rst_in (rst_req),
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.clk_sys(clk_sys),
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.rst_sys(rst_sys),
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.clk_48m(clk_48m),
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.rst_48m(rst_48m)
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);
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endmodule // top
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