141 lines
3.1 KiB
C
141 lines
3.1 KiB
C
/* (C) 2019 by Harald Welte <laforge@osmocom.org>
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* All Rights Reserved
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*
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* SPDX-License-Identifier: GPL-3.0-or-later
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published
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* by the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <stdint.h>
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#include "idt82v2081.h"
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#include "idt82v2081_regs.h"
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/*! \brief Set or clear some (masked) bits inside a register
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* \param[in] e4k reference to the tuner
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* \param[in] reg number of the register
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* \param[in] mask bit-mask of the value
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* \param[in] val data value to be written to register
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* \returns 0 on success, negative in case of error
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*/
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static int idt82_reg_set_bit_mask(struct idt82 *idt, uint8_t reg,
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uint8_t mask, uint8_t val)
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{
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uint8_t tmp = idt82_reg_read(idt, reg);
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if ((tmp & mask) == val)
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return 0;
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return idt82_reg_write(idt, reg, (tmp & ~mask) | (val & mask));
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}
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int idt82_termination(struct idt82 *idt, enum idt82_term term)
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{
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uint8_t puls, scal;
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idt82_reg_set_bit_mask(idt, IDT_REG_TERM, term | (term << IDT_TERM_T_SHIFT),
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IDT_TERM_T_MASK | IDT_TERM_R_MASK);
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switch (idt->mode) {
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case IDT_MODE_E1:
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if (term == IDT_TERM_INT_75)
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puls = 0;
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else
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puls = 1;
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scal = 0x21;
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break;
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case IDT_MODE_T1:
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/* FIXME: different length! */
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puls = 2;
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scal = 0x36;
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break;
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case IDT_MODE_J1:
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puls = 7;
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scal = 0x36;
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break;
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default:
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return -1;
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}
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idt82_reg_set_bit_mask(idt, IDT_REG_TCF1, puls, IDT_TCF1_PULS_MASK);
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idt82_reg_set_bit_mask(idt, IDT_REG_TCF2, scal, IDT_TCF2_SCAL_MASK);
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idt->term = term;
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return 0;
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}
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int idt82_mode(struct idt82 *idt, enum idt82_mode mode)
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{
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switch (mode) {
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case IDT_MODE_E1:
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idt82_reg_set_bit_mask(idt, IDT_REG_GCF, IDT_GCF_T1E1_E1,
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IDT_GCF_T1E1_MASK);
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break;
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case IDT_MODE_T1:
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case IDT_MODE_J1:
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idt82_reg_set_bit_mask(idt, IDT_REG_GCF, IDT_GCF_T1E1_T1,
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IDT_GCF_T1E1_MASK);
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break;
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}
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idt->mode = mode;
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return 0;
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}
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int idt82_get_errcount(struct idt82 *idt)
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{
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uint16_t ret;
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int rc;
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rc = idt82_reg_read(idt, IDT_REG_CNT0);
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if (rc < 0)
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return rc;
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ret = rc;
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rc = idt82_reg_read(idt, IDT_REG_CNT1);
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if (rc < 0)
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return rc;
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ret |= (rc << 8);
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return ret;
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}
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/* return in dB, range is return value ... (value + 2) */
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int idt82_get_line_att(struct idt82 *idt)
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{
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int rc;
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rc = idt82_reg_read(idt, IDT_REG_STAT1);
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if (rc < 0)
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return rc;
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return (rc & IDT_STAT1_ATT_MASK)*2;
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}
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int idt82_init(struct idt82 *idt, bool monitor)
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{
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idt82_reg_write(idt, IDT_REG_RST, 0x00); /* Reset to defaults */
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idt82_mode(idt, IDT_MODE_E1);
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idt82_termination(idt, IDT_TERM_INT_120);
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idt82_reg_write(idt, IDT_REG_TCF0, 0x10); /* Disable TX */
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if (monitor)
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idt82_reg_write(idt, IDT_REG_RCF2, 0x19); /* 22 dB monitor mode */
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return 0;
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}
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