Commit Graph

36 Commits

Author SHA1 Message Date
Martin Schramm d6c12735b1 e1-tracer: add 2x 33R series resistors in USB wires
and
* update improved HC73 package
* move upper third of PCB (LIUs and XOs) left
2020-08-12 16:07:06 +02:00
Martin Schramm a5fd600135 e1-tracer: reapir missing VDD_3V3 on serial debug out's TVS 2020-08-11 23:36:55 +02:00
Martin Schramm 1460628d81 e1-tracer: 'update' our generic rc lib again to purge '..@1' packages 2020-08-11 22:00:52 +02:00
Martin Schramm f75f35966a e1-tracer: finish PCB 2020-08-11 14:35:05 +02:00
Martin Schramm e4d7fbbe84 e1-tracer: state copyright in sch and brd 2020-08-06 16:24:00 +02:00
Martin Schramm 8c9a55db6e e1-tracer: PCB almost ready
... with some room for improvement: LEDs might go to the right of the
2x RJ45
2020-08-06 16:10:16 +02:00
Martin Schramm ff394bdbb0 e1-tracer: commit a first schematic 2020-07-27 13:44:20 +02:00
Harald Welte 190cd58ca7 increase clearance of ground planes; pad roundness 2019-12-20 23:55:34 +01:00
Harald Welte c5a57a2ab5 enlarge board to have proper mounting holes for mechanical mounting 2019-12-20 23:43:50 +01:00
Harald Welte dfe01d45f4 squash most parts and avoid silk screen overlaps all over the place 2019-12-20 23:35:19 +01:00
Harald Welte 2a8c4c5f33 change font to vector / update to v2 2019-12-20 23:14:49 +01:00
Martin Schramm 15e6f9a81b e1_xcvr.brd: minor routing improvement on TRING signal 2018-05-29 20:05:48 +02:00
Martin Schramm 00ebf25701 replace old PULSE_T1094NL footprint, repair pin assignment (solves OSM#3269) 2018-05-29 19:52:28 +02:00
Martin Schramm 8ce574846d laforge.lbr: PULSE_T1094NL: better tPlace and tDocu layer (for OSM#3270) 2018-05-29 19:21:38 +02:00
Martin Schramm 69f96a69ad connect LIU's pin 44 to GND (solves OSM#3247) 2018-05-29 13:38:51 +02:00
Martin Schramm ed2b563216 laforge.lbr: repair PULSE_T1094NL footprint and symbol (solves OSM#3270)
... and OSM#3271. - The transformer symbol is made of two identical coils
and hence it is not possible to mark the "2:" side (pins 9-11) separately.
But the naming of this coil was changed in a way, that, when invoked, the
"2" of the subpart name "TR1-1:2" shows towards the pins 9-11.
Maybe we should evolve to a device symbol with two coils merged rather than
two identical but separated, then an individual naming could honour the
2:1 side and can not be disturbed by e.g. subsequent mirroring. -
Also repaired the name and value designators' layer association.
2018-05-18 21:26:33 +02:00
Harald Welte 5b15f681e5 add E1 tap hardware design 2012-07-21 20:22:23 +02:00
Harald Welte ceb6ef1d21 laforge.lbr: fix amphenol sim reader footprint 2012-07-01 11:21:26 +02:00
Harald Welte b59bfbc3cc major update of laforge.lbr with lots of new components 2012-07-01 10:45:55 +02:00
Harald Welte 638afbb89b 'new' PCB routing by Christian Vogel 2012-03-06 21:53:51 +01:00
Harald Welte 28460ee9e5 major update of laforge.lbr with lots of new components 2012-02-20 23:42:18 +01:00
Harald Welte ceb70a8260 give parts names without "$", use 47nH as L1 (1206) 2012-01-14 12:44:58 +01:00
Harald Welte b8dfc48a37 approve lots of warnings about thinner wires
Christan has routed lots of wires thinner than what the network specific
rules state.  We approve all of them as we don't care about thinner
wires.
2011-12-26 12:59:33 +01:00
Harald Welte 71ba939922 remove stray GNDIO wire, add junction, approve some warnings 2011-12-26 12:59:02 +01:00
Christian Vogel 5becd7e2fa re-route complete board, add PWR jumper, LED series resistor 2011-12-26 12:57:31 +01:00
Harald Welte a40a482b3d add partlist/bom 2011-12-24 17:02:02 +01:00
Harald Welte 372a183036 update schematics and PCB layout 2011-12-24 17:01:54 +01:00
Harald Welte 07c856afa0 re-route pcb with LEDs 2011-12-24 17:00:12 +01:00
Harald Welte f687f38c58 add two LEDs (power and LOS) plus required transistor 2011-12-24 16:51:35 +01:00
Harald Welte a2c23eb8b1 re-route the entire board to add test pads and additional components 2011-12-24 16:23:08 +01:00
Harald Welte 8b0e886f73 just name some signals/networks 2011-12-24 16:22:54 +01:00
Harald Welte 311b277cf4 add solder jumper to bypass TPS736XX (if it is not populated) 2011-12-24 15:58:41 +01:00
Harald Welte df93fb19f6 add 4 test pads for RTIP/RRING/TTIP/TRING 2011-12-24 15:56:40 +01:00
Harald Welte e5fd58a292 re-wire SPI connector to reflect pin-out of Olimex devel board UEXT 2011-12-24 15:54:22 +01:00
Harald Welte f4a1d02c6a Add LDO, remove jumpers, 3nd RJ45, ... 2011-12-24 02:41:25 +01:00
Harald Welte 547bc5cdec initial checkin 2011-12-23 20:57:21 +01:00