gateware/icE1usb: Replace custom I2C core with SB_I2C wrapper

The hard IP kind of sucks ... but we don't need i2c much (or at
all really) and using the hard IP is nearly free (LC-wise).

Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
This commit is contained in:
Sylvain Munaut 2020-10-03 20:52:43 +02:00
parent 205a131f77
commit 5853197f84
3 changed files with 38 additions and 2 deletions

@ -1 +1 @@
Subproject commit aef7d3a8ed1db329fe4815453d52518b9a08e633
Subproject commit e2a0c694e0565ca8e065d27ac82f6746c3cb28a0

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@ -18,7 +18,8 @@ Overview
|`0x87000000` | | E1 core | [`no2e1`](../../cores/no2e1/doc/mem-map.md). See notes below.
|`0x88000000` | | Misc | See below
|`0x89000000` | | GPS UART | [`no2misc/uart_wb`](../../cores/no2misc/doc/uart_wb.md)
|`0x8a000000` | | I2C | See below
|`0x8a000000` | | I2C (\*) | See below
|`0x8a000000` | | I2C (\*) | [`no2ice40/ice40_i2c_wb`](../../cores/no2ice40/doc/ice40_i2c_wb.md)
Memory
@ -293,6 +294,9 @@ Channels :
Very simple I2C core.
Note: This is only one of the possible build option. Alternatively the bitstream can be built
using a `SB_I2C` wrapper for I2C support. In which case, refer to the lattice documentation.
#### Command (Write Only, addr `0x00`)
```text

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@ -11,6 +11,9 @@
`default_nettype none
`define WITH_SB_I2C
// `define WITH_CUSTOM_I2C
module top (
// E1 PHY
input wire e1A_rx_hi_p,
@ -281,6 +284,27 @@ module top (
// I2C [2]
// ---
`ifdef WITH_SB_I2C
// Hard-IP
ice40_i2c_wb #(
.WITH_IOB(1),
.UNIT(0)
) i2c_I (
.i2c_scl (i2c_scl),
.i2c_sda (i2c_sda),
.wb_addr (wb_addr[3:0]),
.wb_rdata (wb_rdata[2]),
.wb_wdata (wb_wdata),
.wb_we (wb_we),
.wb_cyc (wb_cyc[2]),
.wb_ack (wb_ack[2]),
.clk (clk_sys),
.rst (rst_sys)
);
`elsif WITH_CUSTOM_I2C
// Controller
i2c_master_wb #(
.DW(3),
@ -324,6 +348,14 @@ module top (
.D_IN_0 (i2c_sda_i)
);
`else
// Dummy
assign wb_ack[2] = wb_cyc[2];
assign wb_rdata[2] = 32'h00000000;
`endif
// E1 LEDs & Button
// ----------------