This commit adapts 4xx boards for partial linking with --gc-sections.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Tirumala Marri <tmarri@apm.com>
Cc: David Updegraff <dave@cray.com>
Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Cc: Dirk Eibach <eibach@gdsys.de>
Cc: Larry Johnson <lrj@acm.org>
Cc: Peter De Schrijver <p2@mind.be>
Cc: Niklaus Giger <niklaus.giger@netstal.com>
Cc: Daniel Poirot <dan.poirot@windriver.com>
Acked-by: Stefan Roese <sr@denx.de>
A recent gcc added a new unaligned rodata section called '.rodata.str1.1',
which needs to be added the the linker script. Instead of just adding this
one section, we use a wildcard ".rodata*" to get all rodata linker section
gcc has now and might add in the future.
However, '*(.rodata*)' by itself will result in sub-optimal section
ordering. The sections will be sorted by object file, which causes extra
padding between the unaligned rodata.str.1.1 of one object file and the
aligned rodata of the next object file. This is easy to fix by using the
SORT_BY_ALIGNMENT command.
This patch has not be tested one most of the boards modified. Some boards
have a linker script that looks something like this:
*(.text)
. = ALIGN(16);
*(.rodata)
*(.rodata.str1.4)
*(.eh_frame)
I change this to:
*(.text)
. = ALIGN(16);
*(.eh_frame)
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
This means the start of rodata will no longer be 16 bytes aligned.
However, the boundary between text and rodata/eh_frame is still aligned to
16 bytes, which is what I think the real purpose of the ALIGN call is.
Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
Most of the bss initialization loop increments 4 bytes
at a time. And the loop end is checked for an 'equal'
condition. Make the bss end address aligned by 4, so
that the loop will end as expected.
Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
With recent toolchain versions, some boards would not build because
or errors like this one (here for ocotea board when building with
ELDK 4.2 beta):
ppc_4xx-ld: section .bootpg [fffff000 -> fffff23b] overlaps section .bss [fffee900 -> fffff8ab]
For many boards, the .bss section is big enough that it wraps around
at the end of the address space (0xFFFFFFFF), so the problem will not
be visible unless you use a 64 bit tool chain for development. On
some boards however, changes to the code size (due to different
optimizations) we bail out with section overlaps like above.
The fix is to add the NOLOAD attribute to the .bss and .sbss
sections, telling the linker that .bss does not consume any space in
the image.
Signed-off-by: Wolfgang Denk <wd@denx.de>
This patch adds NAND booting support for the AMCC Bamboo eval board.
Since the NAND-SPL boot image is limited to 4kbytes, this version
only supports the onboard 64MBytes of DDR. The DIMM modules can't be
supported, since the setup code for I2C DIMM autodetection and
configuration is too big for this NAND bootloader.
Signed-off-by: Stefan Roese <sr@denx.de>
Wolfgang Denk