Fix NAND FLASH timings for at91sam9x evaluation kits.
New timings are based on application note
"NAND Flash Support on AT91SAM9 Microcontrollers" available at
http://atmel.com/dyn/resources/prod_documents/doc6255.pdf
Signed-off-by: Patrice Vilchez <patice.vilchez@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Stelian Pop <stelian@popies.net>
AT91 RSTC registers are battery-backuped, so their values
are not reset across power cycles. One of those registers,
the AT91_RSTC_MR register, is being modified by U-Boot, in
the ethernet initialisation routine, to generate a 500ms
user reset.
Unfortunately, this value is not being restored afterwards,
causing subsequent resets to also last for 500ms.
This long reset sequence causes problems (at least) in the
boot sequence from NOR: by the time the CPU tries to load
a program from the NOR flash, the latter is still in reset
and not yet available.
Additionaly, this patch fixes a bug in the original code which
caused the reset delay to last for 2s instead of 500ms.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
update mvBL-M7 config file to use UBOOT_VERSION.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
My text-editor (vim) has a bit of trouble syntax-highlighting the
cmd_nvedit.c file, because it apparently does not parse C
ifdef/else/endif. The following patch does not change the behavior of
the code at all, but does allow the editor to properly
syntax-highlight the file.
Signed-off-by: Steve Falco <sfalco@harris.com>
The Register URXD contains status information in bits [15..8].
With status bit 15 set, CTRL-C was reported as 0x8003 instead
of 0x03. Therefore CTRL-C was not detected.
To solve this, bits [15..8] were masked out now.
Signed-off-by: Juergen Kilb <J.Kilb@gmx.de>
Acked-by: Felix Radensky <felix@embedded-sol.com>
This patch fixes a bug where the 460EX/GT PCIe UTLSET1 register was
configured incorrectly. Thanks to Olga Buchonina from AMCC for pointing
this out.
Signed-off-by: Stefan Roese <sr@denx.de>
Global FIT image operations like format check cannot be performed on
a first sector data, defer them to the point when whole FIT image was
uploaded to a system RAM.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Partial ('cmd_nand' case) Acked-by: Grant Erickson <gerickson@nuovations.com>
NAND and DOC bits Acked-by: Scott Wood <scottwood@freescale.com>
The driver need wait for the device updating signature to host.
If we don't wait for it, the driver can not detect the device(disk)
when the system powers up.
Signed-off-by: Dave Liu <daveliu@freescale.com>
This patch implements a fix provided by AMCC so that the lockup upon
simultanious traffic on AHB USB OTG, USB 2.0 and SATA doesn't occur
anymore:
Set SDR0_AHB_CFG[A2P_INCR4] (bit 24) and clear SDR0_AHB_CFG[A2P_PROT2]
(bit 25) for a new 460EX errata regarding concurrent use of AHB USB OTG,
USB 2.0 host and SATA.
This errata is not officially available yet. I'll update the comment
to add the errata number later.
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support for the Lyrtech SFF-SDR board,
based on the TI DaVinci architecture (ARM926EJS).
Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
Signed-off-by: Philip Balister <philip@balister.org>
Signed-off-by: Wolfgang Denk <wd@denx.de>
This moves the MMC and SD Card command definitions from
include/asm/arch/mmc.h into include/mmc.h. These definitions are
given by the MMC and SD Card standards, not by any particular
architecture.
There's a lot more room for consolidation in the MMC drivers which
I'm hoping to get done eventually, but this patch is a start.
Compile-tested for all avr32 boards as well as lpc2292sodimm and
lubbock. This should cover all three mmc drivers in the tree.
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
Current code requires that a compiled device tree have space added to the end to
leave room for extra nodes added by board code (and the chosen node). This
requires that device tree creators anticipate how much space U-Boot will add to
the tree, which is absurd. Ideally, the code would resize and/or relocate the
tree when it needed more space, but this would require a systemic change to the
fdt code, which is non-trivial. Instead, we resize the tree inside
boot_relocate_fdt, reserving either the remainder of the bootmap (in the case
where the fdt is inside the bootmap), or adding CFG_FDT_PAD bytes to the size.
Signed-off-by: Andy Fleming <afleming@freescale.com>
__lmb_alloc_base can underflow if it fails to find free space. This was fixed
in linux with commit d9024df02ffe74d723d97d552f86de3b34beb8cc. This patch
merely updates __lmb_alloc_base to resemble the current version in Linux.
Signed-off-by: Andy Fleming <afleming@freescale.com>
lmb_free allows us to unreserve some memory so we can use lmb_alloc_base or
lmb_reserve to temporarily reserve some memory.
Signed-off-by: Andy Fleming <afleming@freescale.com>
ALIGN() returns the smallest aligned value greater than the passed
in address or size. Taken from Linux.
Signed-off-by: Andy Fleming <afleming@freescale.com>
This patch includes <asm/types.h> before <asm/u-boot.h> in some 4xx
board specific files where it has been missing.
Signed-off-by: Stefan Roese <sr@denx.de>
When compile-testing on powerpc, I get errors like this:
net/nfs.c:422: undefined reference to `__stack_chk_fail_local'
This seems to be because -fstack-protector is on by default, so
let's explicitly disable it on all architectures that support the
option.
The Ubuntu toolchain is affected by this problem, and according to
Mike Frysinger, Gentoo has been running with SSP enabled for years.
More and more distros are turning SSP on by default, so this problem
is likely to get worse in the future.
Also, powerpc just happens to be one of the arches I do
compile-testing on. There may be other arches affected by this too.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
During 83xx setup the "System I/O configuration register high" gets
overwritten with user defined value if CFG_SICRH is defined.
Regarding to the MPC834x manual (Table 5-28 reve.1) bits 28+29 of SICRH
must keep their reset value regardless of configuration.
On my board (using RGMII) those bits are set after reset - yet it's
unclear where they come from.
The patch keeps both bits on MPC834x and MPC8313.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Patrice Vilchez