fsl_sata: Add the workaround for errata SATA-A001
After power on, the SATA host controller of P1022 Rev1 is configured in legacy mode instead of the expected enterprise mode. Software needs to clear bit[28] of HControl register to change to enterprise mode after bringing the host offline. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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@ -21,6 +21,7 @@
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#include <common.h>
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#include <common.h>
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#include <command.h>
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#include <command.h>
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#include <asm/io.h>
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#include <asm/io.h>
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#include <asm/processor.h>
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#include <malloc.h>
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#include <malloc.h>
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#include <libata.h>
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#include <libata.h>
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#include <fis.h>
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#include <fis.h>
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@ -191,6 +192,27 @@ int init_sata(int dev)
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/* Wait the controller offline */
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/* Wait the controller offline */
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ata_wait_register(®->hstatus, HSTATUS_ONOFF, 0, 1000);
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ata_wait_register(®->hstatus, HSTATUS_ONOFF, 0, 1000);
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#if defined(CONFIG_FSL_SATA_V2) && defined(CONFIG_FSL_SATA_ERRATUM_A001)
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/*
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* For P1022/1013 Rev1.0 silicon, after power on SATA host
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* controller is configured in legacy mode instead of the
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* expected enterprise mode. software needs to clear bit[28]
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* of HControl register to change to enterprise mode from
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* legacy mode.
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*/
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{
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u32 svr = get_svr();
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if (IS_SVR_REV(svr, 1, 0) &&
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((SVR_SOC_VER(svr) == SVR_P1022) ||
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(SVR_SOC_VER(svr) == SVR_P1022_E) ||
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(SVR_SOC_VER(svr) == SVR_P1013) ||
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(SVR_SOC_VER(svr) == SVR_P1013_E))) {
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out_le32(®->hstatus, 0x20000000);
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out_le32(®->hcontrol, 0x00000100);
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}
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}
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#endif
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/* Set the command header base address to CHBA register to tell DMA */
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/* Set the command header base address to CHBA register to tell DMA */
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out_le32(®->chba, (u32)cmd_hdr & ~0x3);
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out_le32(®->chba, (u32)cmd_hdr & ~0x3);
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