* Patch by Steven Scholz, 27 Feb 2004:
- Adding get_ticks() and get_tbclk() for AT91RM9200 - Many white space fixes in cpu/at91rm9200/interrupts.c * Patches by Steven Scholz, 20 Feb 2004: some cleanup in AT91RM9200 related code
This commit is contained in:
wdenk
parent
42dfe7a184
commit
d9df1f4e66
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@ -2,6 +2,13 @@
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Changes for U-Boot 1.0.2:
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======================================================================
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* Patch by Steven Scholz, 27 Feb 2004:
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- Adding get_ticks() and get_tbclk() for AT91RM9200
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- Many white space fixes in cpu/at91rm9200/interrupts.c
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* Patches by Steven Scholz, 20 Feb 2004:
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some cleanup in AT91RM9200 related code
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* Patches by Travis Sawyer, 12 Mar 2004:
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- Fix Gigabit Ethernet support for 440GX
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- Add Gigabit Ethernet Support to MII PHY utilities
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10
Makefile
10
Makefile
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@ -905,9 +905,6 @@ ZUMA_config: unconfig
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## StrongARM Systems
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#########################################################################
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at91rm9200dk_config : unconfig
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@./mkconfig $(@:_config=) arm at91rm9200 at91rm9200dk
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dnp1110_config : unconfig
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@./mkconfig $(@:_config=) arm sa1100 dnp1110
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@ -1013,6 +1010,13 @@ ep7312_config : unconfig
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modnet50_config : unconfig
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@./mkconfig $(@:_config=) arm arm720t modnet50
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#########################################################################
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## AT91RM9200 Systems
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#########################################################################
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at91rm9200dk_config : unconfig
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@./mkconfig $(@:_config=) arm at91rm9200 at91rm9200dk
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#########################################################################
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## XScale Systems
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#########################################################################
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@ -41,111 +41,114 @@ extern void reset_cpu(ulong addr);
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#define TIMER_LOAD_VAL 0xffff
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/* macro to read the 16 bit timer */
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#define READ_TIMER (tmr->TC_CV)
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#define READ_TIMER (tmr->TC_CV & 0x0000ffff)
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AT91PS_TC tmr;
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#ifdef CONFIG_USE_IRQ
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#error There is no IRQ support for AT91RM9200 in U-Boot yet.
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#else
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void enable_interrupts (void)
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{
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return;
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return;
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}
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int disable_interrupts (void)
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{
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return 0;
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return 0;
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}
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#endif
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void bad_mode (void)
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{
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panic ("Resetting CPU ...\n");
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reset_cpu (0);
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}
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void bad_mode(void)
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void show_regs (struct pt_regs *regs)
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{
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panic("Resetting CPU ...\n");
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reset_cpu(0);
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unsigned long flags;
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const char *processor_modes[] = {
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"USER_26", "FIQ_26", "IRQ_26", "SVC_26",
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"UK4_26", "UK5_26", "UK6_26", "UK7_26",
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"UK8_26", "UK9_26", "UK10_26", "UK11_26",
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"UK12_26", "UK13_26", "UK14_26", "UK15_26",
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"USER_32", "FIQ_32", "IRQ_32", "SVC_32",
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"UK4_32", "UK5_32", "UK6_32", "ABT_32",
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"UK8_32", "UK9_32", "UK10_32", "UND_32",
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"UK12_32", "UK13_32", "UK14_32", "SYS_32",
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};
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flags = condition_codes (regs);
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printf ("pc : [<%08lx>] lr : [<%08lx>]\n"
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"sp : %08lx ip : %08lx fp : %08lx\n",
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instruction_pointer (regs),
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regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
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printf ("r10: %08lx r9 : %08lx r8 : %08lx\n",
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regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
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printf ("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
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regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
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printf ("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
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regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
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printf ("Flags: %c%c%c%c",
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flags & CC_N_BIT ? 'N' : 'n',
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flags & CC_Z_BIT ? 'Z' : 'z',
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flags & CC_C_BIT ? 'C' : 'c',
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flags & CC_V_BIT ? 'V' : 'v');
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printf (" IRQs %s FIQs %s Mode %s%s\n",
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interrupts_enabled (regs) ? "on" : "off",
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fast_interrupts_enabled (regs) ? "on" : "off",
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processor_modes[processor_mode (regs)],
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thumb_mode (regs) ? " (T)" : "");
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}
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void show_regs(struct pt_regs * regs)
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void do_undefined_instruction (struct pt_regs *pt_regs)
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{
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unsigned long flags;
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const char *processor_modes[]=
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{ "USER_26", "FIQ_26" , "IRQ_26" , "SVC_26" , "UK4_26" , "UK5_26" , "UK6_26" , "UK7_26" ,
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"UK8_26" , "UK9_26" , "UK10_26", "UK11_26", "UK12_26", "UK13_26", "UK14_26", "UK15_26",
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"USER_32", "FIQ_32" , "IRQ_32" , "SVC_32" , "UK4_32" , "UK5_32" , "UK6_32" , "ABT_32" ,
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"UK8_32" , "UK9_32" , "UK10_32", "UND_32" , "UK12_32", "UK13_32", "UK14_32", "SYS_32"
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};
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flags = condition_codes(regs);
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printf("pc : [<%08lx>] lr : [<%08lx>]\n"
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"sp : %08lx ip : %08lx fp : %08lx\n",
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instruction_pointer(regs),
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regs->ARM_lr, regs->ARM_sp,
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regs->ARM_ip, regs->ARM_fp);
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printf("r10: %08lx r9 : %08lx r8 : %08lx\n",
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regs->ARM_r10, regs->ARM_r9,
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regs->ARM_r8);
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printf("r7 : %08lx r6 : %08lx r5 : %08lx r4 : %08lx\n",
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regs->ARM_r7, regs->ARM_r6,
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regs->ARM_r5, regs->ARM_r4);
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printf("r3 : %08lx r2 : %08lx r1 : %08lx r0 : %08lx\n",
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regs->ARM_r3, regs->ARM_r2,
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regs->ARM_r1, regs->ARM_r0);
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printf("Flags: %c%c%c%c",
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flags & CC_N_BIT ? 'N' : 'n',
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flags & CC_Z_BIT ? 'Z' : 'z',
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flags & CC_C_BIT ? 'C' : 'c',
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flags & CC_V_BIT ? 'V' : 'v');
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printf(" IRQs %s FIQs %s Mode %s%s\n",
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interrupts_enabled(regs) ? "on" : "off",
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fast_interrupts_enabled(regs) ? "on" : "off",
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processor_modes[processor_mode(regs)],
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thumb_mode(regs) ? " (T)" : "");
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printf ("undefined instruction\n");
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show_regs (pt_regs);
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bad_mode ();
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}
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void do_undefined_instruction(struct pt_regs *pt_regs)
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void do_software_interrupt (struct pt_regs *pt_regs)
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{
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printf("undefined instruction\n");
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show_regs(pt_regs);
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bad_mode();
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printf ("software interrupt\n");
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show_regs (pt_regs);
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bad_mode ();
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}
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void do_software_interrupt(struct pt_regs *pt_regs)
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void do_prefetch_abort (struct pt_regs *pt_regs)
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{
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printf("software interrupt\n");
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show_regs(pt_regs);
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bad_mode();
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printf ("prefetch abort\n");
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show_regs (pt_regs);
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bad_mode ();
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}
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void do_prefetch_abort(struct pt_regs *pt_regs)
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void do_data_abort (struct pt_regs *pt_regs)
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{
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printf("prefetch abort\n");
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show_regs(pt_regs);
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bad_mode();
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printf ("data abort\n");
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show_regs (pt_regs);
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bad_mode ();
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}
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void do_data_abort(struct pt_regs *pt_regs)
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void do_not_used (struct pt_regs *pt_regs)
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{
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printf("data abort\n");
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show_regs(pt_regs);
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bad_mode();
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printf ("not used\n");
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show_regs (pt_regs);
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bad_mode ();
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}
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void do_not_used(struct pt_regs *pt_regs)
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void do_fiq (struct pt_regs *pt_regs)
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{
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printf("not used\n");
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show_regs(pt_regs);
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bad_mode();
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printf ("fast interrupt request\n");
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show_regs (pt_regs);
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bad_mode ();
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}
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void do_fiq(struct pt_regs *pt_regs)
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void do_irq (struct pt_regs *pt_regs)
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{
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printf("fast interrupt request\n");
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show_regs(pt_regs);
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bad_mode();
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}
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void do_irq(struct pt_regs *pt_regs)
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{
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printf("interrupt request\n");
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show_regs(pt_regs);
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bad_mode();
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printf ("interrupt request\n");
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show_regs (pt_regs);
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bad_mode ();
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}
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static ulong timestamp;
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@ -154,81 +157,103 @@ static ulong lastinc;
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int interrupt_init (void)
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{
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tmr = AT91C_BASE_TC0;
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tmr = AT91C_BASE_TC0;
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/* enables TC1.0 clock */
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*AT91C_PMC_PCER = 1 << AT91C_ID_TC0; /* enable clock */
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/* enables TC1.0 clock */
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*AT91C_PMC_PCER = 1 << AT91C_ID_TC0; /* enable clock */
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*AT91C_TCB0_BCR = 0;
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*AT91C_TCB0_BMR = AT91C_TCB_TC0XC0S_NONE | AT91C_TCB_TC1XC1S_NONE | AT91C_TCB_TC2XC2S_NONE;
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tmr->TC_CCR = AT91C_TC_CLKDIS;
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tmr->TC_CMR = AT91C_TC_TIMER_DIV1_CLOCK; /* set to MCLK/2 */
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*AT91C_TCB0_BCR = 0;
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*AT91C_TCB0_BMR = AT91C_TCB_TC0XC0S_NONE | AT91C_TCB_TC1XC1S_NONE | AT91C_TCB_TC2XC2S_NONE;
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tmr->TC_CCR = AT91C_TC_CLKDIS;
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tmr->TC_CMR = AT91C_TC_TIMER_DIV1_CLOCK; /* set to MCLK/2 */
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tmr->TC_IDR = ~0ul;
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tmr->TC_RC = TIMER_LOAD_VAL;
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lastinc = TIMER_LOAD_VAL;
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tmr->TC_CCR = AT91C_TC_SWTRG | AT91C_TC_CLKEN;
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timestamp = 0;
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return (0);
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tmr->TC_IDR = ~0ul;
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tmr->TC_RC = TIMER_LOAD_VAL;
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lastinc = TIMER_LOAD_VAL;
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tmr->TC_CCR = AT91C_TC_SWTRG | AT91C_TC_CLKEN;
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timestamp = 0;
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return (0);
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}
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/*
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* timer without interrupts
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*/
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void reset_timer(void)
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void reset_timer (void)
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{
|
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reset_timer_masked();
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reset_timer_masked ();
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}
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||||
|
||||
ulong get_timer (ulong base)
|
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{
|
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return get_timer_masked() - base;
|
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return get_timer_masked () - base;
|
||||
}
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||||
|
||||
void set_timer (ulong t)
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{
|
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timestamp = t;
|
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timestamp = t;
|
||||
}
|
||||
|
||||
void udelay(unsigned long usec)
|
||||
void udelay (unsigned long usec)
|
||||
{
|
||||
udelay_masked(usec);
|
||||
udelay_masked(usec);
|
||||
}
|
||||
|
||||
void reset_timer_masked(void)
|
||||
void reset_timer_masked (void)
|
||||
{
|
||||
/* reset time */
|
||||
lastinc = READ_TIMER;
|
||||
timestamp = 0;
|
||||
/* reset time */
|
||||
lastinc = READ_TIMER;
|
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timestamp = 0;
|
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}
|
||||
|
||||
ulong get_timer_masked(void)
|
||||
ulong get_timer_masked (void)
|
||||
{
|
||||
ulong now = READ_TIMER;
|
||||
if (now >= lastinc)
|
||||
{
|
||||
/* normal mode */
|
||||
timestamp += now - lastinc;
|
||||
} else {
|
||||
/* we have an overflow ... */
|
||||
timestamp += now + TIMER_LOAD_VAL - lastinc;
|
||||
}
|
||||
lastinc = now;
|
||||
ulong now = READ_TIMER;
|
||||
|
||||
return timestamp;
|
||||
if (now >= lastinc) {
|
||||
/* normal mode */
|
||||
timestamp += now - lastinc;
|
||||
} else {
|
||||
/* we have an overflow ... */
|
||||
timestamp += now + TIMER_LOAD_VAL - lastinc;
|
||||
}
|
||||
lastinc = now;
|
||||
|
||||
return timestamp;
|
||||
}
|
||||
|
||||
void udelay_masked(unsigned long usec)
|
||||
void udelay_masked (unsigned long usec)
|
||||
{
|
||||
ulong tmo;
|
||||
ulong tmo;
|
||||
|
||||
tmo = usec / 1000;
|
||||
tmo *= CFG_HZ;
|
||||
tmo /= 1000;
|
||||
tmo = usec / 1000;
|
||||
tmo *= CFG_HZ;
|
||||
tmo /= 1000;
|
||||
|
||||
reset_timer_masked();
|
||||
reset_timer_masked ();
|
||||
|
||||
while(get_timer_masked() < tmo);
|
||||
/*NOP*/;
|
||||
while (get_timer_masked () < tmo)
|
||||
/*NOP*/;
|
||||
}
|
||||
|
||||
/*
|
||||
* This function is derived from PowerPC code (read timebase as long long).
|
||||
* On ARM it just returns the timer value.
|
||||
*/
|
||||
unsigned long long get_ticks(void)
|
||||
{
|
||||
return get_timer(0);
|
||||
}
|
||||
|
||||
/*
|
||||
* This function is derived from PowerPC code (timebase clock frequency).
|
||||
* On ARM it returns the number of timer ticks per second.
|
||||
*/
|
||||
ulong get_tbclk (void)
|
||||
{
|
||||
ulong tbclk;
|
||||
|
||||
tbclk = CFG_HZ;
|
||||
return tbclk;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -36,55 +36,54 @@
|
|||
/* ggi thunder */
|
||||
AT91PS_USART us = (AT91PS_USART) AT91C_BASE_DBGU;
|
||||
|
||||
void serial_setbrg(void)
|
||||
{
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
int baudrate;
|
||||
void serial_setbrg (void)
|
||||
{
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
int baudrate;
|
||||
|
||||
if ((baudrate = gd->bd->bi_baudrate) <= 0)
|
||||
baudrate = CONFIG_BAUDRATE;
|
||||
us->US_BRGR = 33 /* AT91C_MASTER_CLOCK / baudrate / 16 */; /* hardcode so no __divsi3 */
|
||||
}
|
||||
if ((baudrate = gd->bd->bi_baudrate) <= 0)
|
||||
baudrate = CONFIG_BAUDRATE;
|
||||
us->US_BRGR = CFG_AT91C_BRGR_DIVISOR; /* hardcode so no __divsi3 */
|
||||
}
|
||||
|
||||
int serial_init(void)
|
||||
{
|
||||
/* make any port initializations specific to this port */
|
||||
*AT91C_PIOA_PDR = AT91C_PA31_DTXD | AT91C_PA30_DRXD; /* PA 31 & 30 */
|
||||
*AT91C_PMC_PCER = 1 << AT91C_ID_SYS; /* enable clock */
|
||||
serial_setbrg();
|
||||
int serial_init (void)
|
||||
{
|
||||
/* make any port initializations specific to this port */
|
||||
*AT91C_PIOA_PDR = AT91C_PA31_DTXD | AT91C_PA30_DRXD; /* PA 31 & 30 */
|
||||
*AT91C_PMC_PCER = 1 << AT91C_ID_SYS; /* enable clock */
|
||||
serial_setbrg ();
|
||||
|
||||
us->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX;
|
||||
us->US_CR = AT91C_US_RXEN | AT91C_US_TXEN;
|
||||
us->US_MR = ( AT91C_US_CLKS_CLOCK | AT91C_US_CHRL_8_BITS | AT91C_US_PAR_NONE | AT91C_US_NBSTOP_1_BIT );
|
||||
us->US_IMR = ~0ul;
|
||||
return (0);
|
||||
}
|
||||
us->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX;
|
||||
us->US_CR = AT91C_US_RXEN | AT91C_US_TXEN;
|
||||
us->US_MR =
|
||||
(AT91C_US_CLKS_CLOCK | AT91C_US_CHRL_8_BITS |
|
||||
AT91C_US_PAR_NONE | AT91C_US_NBSTOP_1_BIT);
|
||||
us->US_IMR = ~0ul;
|
||||
return (0);
|
||||
}
|
||||
|
||||
void serial_putc(const char c)
|
||||
{
|
||||
if (c == '\n')
|
||||
serial_putc('\r');
|
||||
while( (us->US_CSR & AT91C_US_TXRDY) == 0 )
|
||||
;
|
||||
us->US_THR=c;
|
||||
}
|
||||
void serial_putc (const char c)
|
||||
{
|
||||
if (c == '\n')
|
||||
serial_putc ('\r');
|
||||
while ((us->US_CSR & AT91C_US_TXRDY) == 0);
|
||||
us->US_THR = c;
|
||||
}
|
||||
|
||||
void
|
||||
serial_puts (const char *s)
|
||||
{
|
||||
while (*s)
|
||||
{
|
||||
serial_putc (*s++);
|
||||
}
|
||||
}
|
||||
void serial_puts (const char *s)
|
||||
{
|
||||
while (*s) {
|
||||
serial_putc (*s++);
|
||||
}
|
||||
}
|
||||
|
||||
int serial_getc(void)
|
||||
{
|
||||
while( (us->US_CSR & AT91C_US_RXRDY) == 0 );
|
||||
return us->US_RHR;
|
||||
}
|
||||
int serial_getc (void)
|
||||
{
|
||||
while ((us->US_CSR & AT91C_US_RXRDY) == 0);
|
||||
return us->US_RHR;
|
||||
}
|
||||
|
||||
int serial_tstc(void)
|
||||
{
|
||||
return ((us->US_CSR & AT91C_US_RXRDY) == AT91C_US_RXRDY);
|
||||
}
|
||||
int serial_tstc (void)
|
||||
{
|
||||
return ((us->US_CSR & AT91C_US_RXRDY) == AT91C_US_RXRDY);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -28,11 +28,6 @@
|
|||
#include "AT91RM9200_inc.h"
|
||||
#endif
|
||||
|
||||
/* AT91RM92000 clocks */
|
||||
#define AT91_MAIN_CLOCK 179712000 /* from 18.432 MHz crystal (18432000 / 4 * 39) */
|
||||
#define AT91_MASTER_CLOCK 59904000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */
|
||||
#define AT91_SLOW_CLOCK 32768 /* slow clock */
|
||||
|
||||
/* Virtual and Physical base address for system peripherals */
|
||||
#define AT91_SYS_BASE 0xFFFFF000 /*4K */
|
||||
|
||||
|
|
|
|||
|
|
@ -36,6 +36,8 @@
|
|||
#define AT91C_MASTER_CLOCK 59904000 /* peripheral clock (AT91C_MASTER_CLOCK / 3) */
|
||||
/* #define AT91C_MASTER_CLOCK 44928000 */ /* peripheral clock (AT91C_MASTER_CLOCK / 4) */
|
||||
|
||||
#define AT91_SLOW_CLOCK 32768 /* slow clock */
|
||||
|
||||
#define CONFIG_AT91RM9200DK 1 /* on an AT91RM9200DK Board */
|
||||
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
|
||||
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
|
||||
|
|
@ -50,6 +52,8 @@
|
|||
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
|
||||
#define CFG_AT91C_BRGR_DIVISOR 33 /* hardcode so no __divsi3 : AT91C_MASTER_CLOCK / baudrate / 16 */
|
||||
|
||||
/*
|
||||
* Hardware drivers
|
||||
*/
|
||||
|
|
|
|||
Loading…
Reference in New Issue