powerpc: Cleanup BOOTFLAG_* references

Now that warm booting is not supported, there isn't a need for the
BOOTFLAG_COLD and BOOTFLAG_WARM defines, so remove them.

Note that this change makes the board info bd_bootflags field useless.
It will always be set to 0, but we leave it around so that we don't
break the board info structure that some OSes are expecting to be passed
from U-Boot.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
This commit is contained in:
Peter Tyser 2010-10-14 23:33:24 -05:00 committed by Wolfgang Denk
parent 29c6fbe047
commit d98b0523cf
287 changed files with 14 additions and 2082 deletions

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@ -42,6 +42,7 @@
#include <asm/cache.h>
#include <asm/mmu.h>
#include <asm/u-boot.h>
#if !defined(CONFIG_DB64360) && \
!defined(CONFIG_DB64460) && \

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@ -43,6 +43,7 @@
#include <asm/cache.h>
#include <asm/mmu.h>
#include <asm/u-boot.h>
#ifndef CONFIG_IDENT_STRING
#define CONFIG_IDENT_STRING "MPC512X"

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@ -43,6 +43,7 @@
#include <linux/config.h>
#include <asm/processor.h>
#include <asm/u-boot.h>
#ifndef CONFIG_IDENT_STRING
#define CONFIG_IDENT_STRING ""

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@ -38,6 +38,7 @@
#include <asm/cache.h>
#include <asm/mmu.h>
#include <asm/u-boot.h>
#ifndef CONFIG_IDENT_STRING
#define CONFIG_IDENT_STRING ""

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@ -37,6 +37,7 @@
#include <asm/cache.h>
#include <asm/mmu.h>
#include <asm/u-boot.h>
#ifndef CONFIG_IDENT_STRING
#define CONFIG_IDENT_STRING ""

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@ -49,6 +49,7 @@
#include <asm/cache.h>
#include <asm/mmu.h>
#include <asm/u-boot.h>
#ifndef CONFIG_IDENT_STRING
#define CONFIG_IDENT_STRING ""

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@ -38,6 +38,7 @@
#include <asm/cache.h>
#include <asm/mmu.h>
#include <asm/u-boot.h>
#ifndef CONFIG_IDENT_STRING
#define CONFIG_IDENT_STRING ""

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@ -40,6 +40,7 @@
#include <asm/cache.h>
#include <asm/mmu.h>
#include <asm/u-boot.h>
#ifndef CONFIG_IDENT_STRING
#define CONFIG_IDENT_STRING "MPC83XX"

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@ -40,6 +40,7 @@
#include <asm/cache.h>
#include <asm/mmu.h>
#include <asm/u-boot.h>
#ifndef CONFIG_IDENT_STRING
#define CONFIG_IDENT_STRING ""

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@ -50,6 +50,7 @@
#include <asm/cache.h>
#include <asm/mmu.h>
#include <asm/u-boot.h>
#ifndef CONFIG_IDENT_STRING
#define CONFIG_IDENT_STRING ""

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@ -62,7 +62,7 @@ typedef struct bd_info {
unsigned long bi_flbfreq; /* Flexbus Freq, in MHz */
unsigned long bi_vcofreq; /* VCO Freq, in MHz */
#endif
unsigned long bi_bootflags; /* boot / reboot flag (for LynxOS) */
unsigned long bi_bootflags; /* boot / reboot flag (Unused) */
unsigned long bi_ip_addr; /* IP Address */
unsigned char bi_enetaddr[6]; /* OLD: see README.enetaddr */
unsigned short bi_ethspeed; /* Ethernet speed in Mbps */

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@ -546,8 +546,6 @@ void board_init_f (ulong bootflag)
}
#endif
bd->bi_bootflags = bootflag; /* boot / reboot flag (for LynxOS) */
WATCHDOG_RESET ();
bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */

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@ -351,14 +351,6 @@
#define CONFIG_SYS_OR1_PRELIM 0xFFFF8110 /* 64Kbyte address space */
#define CONFIG_SYS_BR1_PRELIM ((BCSR_ADDR) | BR_V)
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/* values according to the manual */
#define BCSR0 ((uint) (BCSR_ADDR + 0x00))

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@ -311,12 +311,4 @@
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#endif /* __CONFIG_H */

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@ -202,13 +202,4 @@
#define FLASH_BASE0_PRELIM 0xFFC00000 /* FLASH bank #0 */
#define FLASH_BASE1_PRELIM 0xFFE00000 /* FLASH bank #1 */
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#endif /* __CONFIG_H */

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@ -299,12 +299,4 @@
#define CONFIG_SYS_OR6_PRELIM 0xFFFF8000 /* 32kB, 15 waits, cs after addr, no bursts */
#define CONFIG_SYS_BR6_PRELIM 0x60000401 /* use GPCM for CS generation, 8 bit port */
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#endif /* __CONFIG_H */

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@ -220,14 +220,6 @@
*/
#define SPD_EEPROM_ADDRESS 0x50
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */

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@ -430,14 +430,6 @@
#define CONFIG_SYS_BOOTCOUNT_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 8)
#endif
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/*
* PCI OHCI controller
*/

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@ -271,12 +271,4 @@
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#endif /* __CONFIG_H */

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@ -352,14 +352,6 @@
#define CONFIG_SYS_DUART_RST (0x80000000 >> 14)
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/*
* Default speed selection (cpu_plb_opb_ebc) in mhz.
* This value will be set if iic boot eprom is disabled.

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@ -382,14 +382,6 @@
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */

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@ -209,14 +209,6 @@
*/
#define CONFIG_SYS_CACHELINE_SIZE 16 /* For all MPC8xx chips */
/*-----------------------------------------------------------------------
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from flash */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP 1

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@ -41,9 +41,6 @@
#define CONFIG_SYS_MPC8220_CLKIN 30000000/* ... running at 30MHz */
#define CONFIG_SYS_MPC8220_SYSPLL_VCO_MULTIPLIER 16 /* VCO multiplier can't be read from any register */
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/*
* Serial console configuration
*/

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@ -468,15 +468,6 @@ extern unsigned long bab7xx_get_gclk_freq (void);
#define CONFIG_SYS_L2_BAB7xx
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#define CONFIG_NET_MULTI /* Multi ethernet cards support */
#define CONFIG_TULIP
#define CONFIG_TULIP_SELECT_MEDIA

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@ -68,9 +68,6 @@
#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
/*

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@ -302,13 +302,4 @@
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#endif /* __CONFIG_H */

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@ -228,13 +228,4 @@
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#endif /* __CONFIG_H */

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@ -542,15 +542,6 @@
#define CONFIG_SYS_GPIO0_TSRH 0x00000000
#define CONFIG_SYS_GPIO0_TCR 0xF7FF8014
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#define CONFIG_NO_SERIAL_EEPROM
/*--------------------------------------------------------------------*/

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@ -319,14 +319,6 @@
#define CONFIG_SYS_EEPROM_WP (0x80000000 >> 8) /* GPIO8 */
#define CONFIG_SYS_PLD_RESET (0x80000000 >> 12) /* GPIO12 */
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/*
* Default speed selection (cpu_plb_opb_ebc) in mhz.
* This value will be set if iic boot eprom is disabled.

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@ -339,16 +339,6 @@
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/*----------------------------------------------------------------------*/
/* CPC45 Memory Map */
/*----------------------------------------------------------------------*/

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@ -272,12 +272,4 @@
#define CONFIG_SYS_PB_LED (0x80000000 >> 16) /* GPIO16 */
#define CONFIG_SYS_INTA_FAKE (0x80000000 >> 23) /* GPIO23 */
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#endif /* __CONFIG_H */

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@ -340,13 +340,4 @@
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#endif /* __CONFIG_H */

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@ -401,13 +401,4 @@
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#endif /* __CONFIG_H */

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@ -393,13 +393,4 @@
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#endif /* __CONFIG_H */

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@ -396,12 +396,4 @@
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#endif /* __CONFIG_H */

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@ -618,14 +618,6 @@
#define L2_ENABLE (L2_INIT | L2CR_L2E)
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#define CONFIG_SYS_BOARD_ASM_INIT 1
#define CPCI750_SLAVE_TEST (((in8(0xf0300000) & 0x80) == 0) ? 0 : 1)

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@ -254,12 +254,4 @@
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#endif /* __CONFIG_H */

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@ -339,15 +339,6 @@
#define CONFIG_ENV_SIZE (2048 - 512)
#endif
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/*-----------------------------------------------------------------------
* Cache Configuration
*/

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@ -360,15 +360,6 @@
#define CONFIG_ENV_SIZE (2048 - 512)
#endif
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/*-----------------------------------------------------------------------
* Cache Configuration
*/

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@ -248,12 +248,4 @@
#define EEPROM_WRITE_ADDRESS 0xA0
#define EEPROM_READ_ADDRESS 0xA1
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#endif /* __CONFIG_H */

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@ -291,14 +291,6 @@
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/*-----------------------------------------------------------------------
* PCI stuff
*-----------------------------------------------------------------------

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@ -192,13 +192,4 @@
#define FLASH_BASE0_PRELIM 0xFFE00000 /* FLASH bank #0 */
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#endif /* __CONFIG_H */

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@ -595,14 +595,6 @@ ip=${ipaddr}:${serverip}${bootargs_end}; bootm 0x400000;\0"
#define L2_ENABLE (L2_INIT | L2CR_L2E)
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#define CONFIG_SYS_BOARD_ASM_INIT 1
#endif /* __CONFIG_H */

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@ -533,14 +533,6 @@ ip=${ipaddr}:${serverip}${bootargs_end}; bootm 0x400000;\0"
#define L2_ENABLE (L2_INIT | L2CR_L2E)
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#define CONFIG_SYS_BOARD_ASM_INIT 1
#endif /* __CONFIG_H */

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@ -258,14 +258,6 @@
#define CONFIG_SYS_GPIO0_TSRH 0x00000000 /* 16 ... 31 */
#define CONFIG_SYS_GPIO0_TCR 0xB7FE0014 /* 0 ... 31 */
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/*
* Default speed selection (cpu_plb_opb_ebc) in mhz.
* This value will be set if iic boot eprom is disabled.

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@ -291,13 +291,4 @@
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#endif /* __CONFIG_H */

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@ -421,14 +421,6 @@ int du440_phy_addr(int devnum);
#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND0_ADDR + CONFIG_SYS_NAND0_CS, \
CONFIG_SYS_NAND1_ADDR + CONFIG_SYS_NAND1_CS}
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */

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@ -349,14 +349,6 @@
#endif
#define L2_ENABLE (L2_INIT | L2CR_L2E)
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#define CONFIG_NET_MULTI /* Multi ethernet cards support */
#define CONFIG_EEPRO100
#define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */

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@ -388,17 +388,4 @@
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
/*-----------------------------------------------------------------------
* Internal Definitions
*-----------------------------------------------------------------------
*
*/
/*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#endif /* __CONFIG_H */

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@ -207,12 +207,4 @@
*/
#define CONFIG_SYS_CACHELINE_SIZE 16 /* For all MPC8xx chips */
/*-----------------------------------------------------------------------
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from flash */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#endif /* __CONFIG_H */

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@ -363,14 +363,6 @@
*/
#define SPD_EEPROM_ADDRESS 0x50
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */

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@ -312,22 +312,4 @@
#define CONFIG_SYS_MAMR_8COL 0x18803112
#define CONFIG_SYS_MAMR_9COL 0x18803112 /* same as 8 column because its just easier to port with*/
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#endif /* __CONFIG_H */

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@ -357,13 +357,4 @@
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_1X)
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#endif /* __CONFIG_H */

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@ -421,14 +421,6 @@
#define L2_ENABLE (L2_INIT | L2CR_L2E)
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#define CONFIG_SYS_BOARD_ASM_INIT 1

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@ -205,14 +205,6 @@
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */

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@ -343,13 +343,6 @@
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
#define CONFIG_SYS_MAMR 0x13a01114
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/* values according to the manual */

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@ -297,14 +297,6 @@
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
#define CONFIG_SYS_MAMR 0x13a01114
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/* values according to the manual */

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@ -314,12 +314,4 @@
#define CONFIG_SYS_OR4 ( OR_AM_MSK | OR_CSNT_SAM | OR_BI | OR_G5LS)
#define CONFIG_SYS_BR4 ( (DSP_BASE & BR_BA_MSK) | BR_PS_16 | BR_MS_UPMB | BR_V )
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#endif /* __CONFIG_H */

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@ -430,15 +430,6 @@
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP 1

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@ -430,15 +430,6 @@
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#define CONFIG_SCC1_ENET
/* pass open firmware flat tree */

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@ -382,14 +382,6 @@
#define CONFIG_SYS_GPIO0_TSRH 0x00000000
#define CONFIG_SYS_GPIO0_TCR 0xF7FF8014
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/*
* Default speed selection (cpu_plb_opb_ebc) in mhz.
* This value will be set if iic boot eprom is disabled.

View File

@ -726,12 +726,6 @@
BR_V \
)
/*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/*
* FEC interrupt assignment
*/

View File

@ -333,14 +333,6 @@
MAMR_G0CLA_A11 | MAMR_RLFA_1X | MAMR_WLFA_1X \
| MAMR_TLFA_4X) /* 0x5d802114 */
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/* values according to the manual */
#define CONFIG_DRAM_50MHZ 1

View File

@ -482,14 +482,6 @@
#define CONFIG_SYS_LCD0_RST (0x80000000 >> 30)
#define CONFIG_SYS_LCD1_RST (0x80000000 >> 31)
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/*
* Default speed selection (cpu_plb_opb_ebc) in mhz.
* This value will be set if iic boot eprom is disabled.

View File

@ -378,14 +378,6 @@
# define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/* values according to the manual */
#define CONFIG_DRAM_50MHZ 1
#define CONFIG_SDRAM_50MHZ

View File

@ -355,14 +355,6 @@
#define CONFIG_SYS_UART4_RS232 (0x80000000 >> 7)
#define CONFIG_SYS_UART5_RS232 (0x80000000 >> 8)
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/*
* Default speed selection (cpu_plb_opb_ebc) in mhz.
* This value will be set if iic boot eprom is disabled.

View File

@ -372,15 +372,6 @@
MAMR_AMA_TYPE_0 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A11 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_8X)
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#ifdef CONFIG_MPC860T
/* Interrupt level assignments.

View File

@ -450,13 +450,6 @@
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
#define CONFIG_SYS_MAMR 0x13a01114
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#ifdef CONFIG_MPC860T

View File

@ -311,15 +311,6 @@
#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc()*/
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH*/
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/*-----------------------------------------------------------------------
* Cache Configuration
*/

View File

@ -458,18 +458,4 @@ typedef struct ip860_bcsr_s {
#define BD_CTRL_FLWE 0x20 /* Flash Write Enable */
#define BD_CTRL_RWDN 0x10 /* VMEBus Requester Release When Done Enable */
/*-----------------------------------------------------------------------
*
*-----------------------------------------------------------------------
*
*/
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#endif /* __CONFIG_H */

View File

@ -251,15 +251,6 @@
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
/*-----------------------------------------------------------------------
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/*-----------------------------------------------------------------------
* Cache Configuration
*/

View File

@ -236,14 +236,6 @@
#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
/*-----------------------------------------------------------------------
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from flash */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/*-----------------------------------------------------------------------
* Cache Configuration
*/

View File

@ -475,13 +475,4 @@
MBMR_AMB_TYPE_1 | MBMR_DSB_1_CYCL | MBMR_G0CLB_A10 | \
MBMR_RLFB_1X | MBMR_WLFB_1X | MBMR_TLFB_4X)
#endif
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#endif /* __CONFIG_H */

View File

@ -458,13 +458,4 @@
MBMR_RLFB_1X | MBMR_WLFB_1X | MBMR_TLFB_4X)
#endif
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#endif /* __CONFIG_H */

View File

@ -46,9 +46,6 @@
#define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#define CONFIG_HIGH_BATS 1 /* High BATs supported */
/*

View File

@ -295,15 +295,6 @@
/* Configuration Port location */
#define CONFIG_PORT_ADDR 0xF0000500
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */

View File

@ -289,14 +289,6 @@
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal PowerOn: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port baud */
#define CONFIG_KGDB_SER_INDEX 2 /* kgdb serial port */

View File

@ -497,15 +497,6 @@
#define LATCH_ADDR 0x90000200
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */
#define CONFIG_AUTOBOOT_STOP_STR "."
#define CONFIG_SILENT_CONSOLE 1

View File

@ -448,15 +448,6 @@
#define LATCH_ADDR 0x90000200
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */
#define CONFIG_AUTOBOOT_STOP_STR "." /* easy to stop for now */

View File

@ -341,14 +341,6 @@
MAMR_AMA_TYPE_0 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A11 | \
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/*
* JFFS2 partitions
*

View File

@ -312,12 +312,4 @@
*/
#define CONFIG_SYS_DER 0
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#endif /* __CONFIG_H */

View File

@ -284,14 +284,6 @@
MAMR_RLFA_1X | MAMR_WLFA_1X | MAMR_TLFA_4X)
#define CONFIG_SYS_MAMR 0x13821000
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/* values according to the manual */

View File

@ -354,14 +354,6 @@
*/
#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal PowerOn: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port baud */
#define CONFIG_KGDB_SER_INDEX 2 /* kgdb serial port */

View File

@ -388,12 +388,4 @@
*/
#define CONFIG_SYS_DER 0
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#endif /* __CONFIG_H */

View File

@ -318,15 +318,6 @@
#define CONFIG_SYS_BOOTCOUNT_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 12)
#endif
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/***********************************************************************
* External peripheral base address
***********************************************************************/

View File

@ -222,14 +222,6 @@
*/
#define SPD_EEPROM_ADDRESS 0x50
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */

View File

@ -316,15 +316,6 @@
*/
#define CONFIG_SYS_CACHELINE_SIZE 16
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/* Localizations */
#if 0
#define CONFIG_ETHADDR 0:0:0:0:1:d

View File

@ -377,10 +377,8 @@
#define CONFIG_SYS_HRCW_SLAVE6 0
#define CONFIG_SYS_HRCW_SLAVE7 0
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT
#endif

View File

@ -421,10 +421,8 @@
#define CONFIG_SYS_HRCW_SLAVE6 0
#define CONFIG_SYS_HRCW_SLAVE7 0
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
# define CONFIG_SYS_RAMBOOT
#endif

View File

@ -497,14 +497,6 @@
#define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L
#define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/*
* Environment Configuration
*/

View File

@ -580,14 +580,6 @@
#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
/*
* Environment Configuration
*/

View File

@ -608,14 +608,6 @@
#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */

View File

@ -509,14 +509,6 @@
#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#if (CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */

View File

@ -526,14 +526,6 @@
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
#endif
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */

View File

@ -669,14 +669,6 @@
#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */

View File

@ -664,14 +664,6 @@ boards, we say we have two, but don't display a message if we find only one. */
#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */

View File

@ -570,14 +570,6 @@
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
#endif
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */

View File

@ -486,14 +486,6 @@
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
#endif /* CONFIG_PCI */
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */

View File

@ -620,14 +620,6 @@ extern int board_pci_host_broken(void);
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
#endif
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */

View File

@ -629,14 +629,6 @@
#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
#endif
/*
* Internal Definitions
*
* Boot Flags
*/
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */

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