Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

This commit is contained in:
Wolfgang Denk 2010-05-30 21:44:07 +02:00
commit 9bb3b3d440
3 changed files with 9 additions and 5 deletions

View File

@ -1912,7 +1912,8 @@ typedef struct ccsr_gur {
#define MPC85xx_PMUXCR_SD_DATA 0x80000000
#define MPC85xx_PMUXCR_SDHC_CD 0x40000000
#define MPC85xx_PMUXCR_SDHC_WP 0x20000000
u8 res6[12];
u32 pmuxcr2; /* Alt. function signal multiplex control 2 */
u8 res6[8];
u32 devdisr; /* Device disable control */
#define MPC85xx_DEVDISR_PCI1 0x80000000
#define MPC85xx_DEVDISR_PCI2 0x40000000
@ -1949,10 +1950,12 @@ typedef struct ccsr_gur {
#if defined(CONFIG_MPC8568)||defined(CONFIG_MPC8569)
u8 res10b[76];
par_io_t qe_par_io[7];
u8 res10c[3136];
u8 res10c[1600];
#else
u8 res10b[3404];
u8 res10b[1868];
#endif
u32 clkdvdr; /* Clock Divide register */
u8 res10d[1532];
u32 clkocr; /* Clock out select */
u8 res11[12];
u32 ddrdllcr; /* DDR DLL control */

View File

@ -24,7 +24,7 @@ typedef struct ngpixis {
u8 aux;
u8 spd;
u8 brdcfg0;
u8 dma;
u8 brdcfg1; /* On some boards, this register is called 'dma' */
u8 addr;
u8 res2[2];
u8 data;

View File

@ -534,7 +534,8 @@ void fdt_fixup_crypto_node(void *blob, int sec_rev)
{ 0x0202, 1, 24, 0x04c, 0x0122003f }, /* SEC 2.2 */
{ 0x0204, 4, 24, 0x07e, 0x012b0ebf }, /* SEC 2.4 */
{ 0x0300, 4, 24, 0x9fe, 0x03ab0ebf }, /* SEC 3.0 */
{ 0x0303, 4, 24, 0x97c, 0x03ab0abf }, /* SEC 3.3 */
{ 0x0301, 4, 24, 0xbfe, 0x03ab0ebf }, /* SEC 3.1 */
{ 0x0303, 4, 24, 0x97c, 0x03a30abf }, /* SEC 3.3 */
};
char compat_strlist[ARRAY_SIZE(sec_rev_prop_list) *
sizeof("fsl,secX.Y")];