From 6e37a044076896ba88b0d6316fadd492032c5193 Mon Sep 17 00:00:00 2001 From: Timur Tabi Date: Thu, 20 May 2010 12:45:39 -0500 Subject: [PATCH 1/3] fsl/85xx: add clkdvdr and pmuxcr2 to global utilities structure definition Add the 'clkdvdr' and 'pmuxcr2' registers to the 85xx definition of struct ccsr_gur. Signed-off-by: Timur Tabi Signed-off-by: Kumar Gala --- arch/powerpc/include/asm/immap_85xx.h | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index e7954e657..5b205d1c2 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -1912,7 +1912,8 @@ typedef struct ccsr_gur { #define MPC85xx_PMUXCR_SD_DATA 0x80000000 #define MPC85xx_PMUXCR_SDHC_CD 0x40000000 #define MPC85xx_PMUXCR_SDHC_WP 0x20000000 - u8 res6[12]; + u32 pmuxcr2; /* Alt. function signal multiplex control 2 */ + u8 res6[8]; u32 devdisr; /* Device disable control */ #define MPC85xx_DEVDISR_PCI1 0x80000000 #define MPC85xx_DEVDISR_PCI2 0x40000000 @@ -1949,10 +1950,12 @@ typedef struct ccsr_gur { #if defined(CONFIG_MPC8568)||defined(CONFIG_MPC8569) u8 res10b[76]; par_io_t qe_par_io[7]; - u8 res10c[3136]; + u8 res10c[1600]; #else - u8 res10b[3404]; + u8 res10b[1868]; #endif + u32 clkdvdr; /* Clock Divide register */ + u8 res10d[1532]; u32 clkocr; /* Clock out select */ u8 res11[12]; u32 ddrdllcr; /* DDR DLL control */ From 5f4d36825a028e300b7d56a566d2cf84418b7a68 Mon Sep 17 00:00:00 2001 From: Timur Tabi Date: Thu, 20 May 2010 11:16:16 -0500 Subject: [PATCH 2/3] fsl: rename 'dma' to 'brdcfg1' in the ngPIXIS structure The ngPIXIS is a board-specific FPGA, but the definition of the registers is mostly consistent. On boards where it matter, register 9 is called 'brdcfg1' instead of 'dma', so rename the variable in the ngpixis_t definition. Signed-off-by: Timur Tabi Signed-off-by: Kumar Gala --- board/freescale/common/ngpixis.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/board/freescale/common/ngpixis.h b/board/freescale/common/ngpixis.h index 284d044c8..3c59ea802 100644 --- a/board/freescale/common/ngpixis.h +++ b/board/freescale/common/ngpixis.h @@ -24,7 +24,7 @@ typedef struct ngpixis { u8 aux; u8 spd; u8 brdcfg0; - u8 dma; + u8 brdcfg1; /* On some boards, this register is called 'dma' */ u8 addr; u8 res2[2]; u8 data; From 3057c6be5efda781a72ca04432e0a4ed6e670030 Mon Sep 17 00:00:00 2001 From: Kim Phillips Date: Fri, 23 Apr 2010 12:20:11 -0500 Subject: [PATCH 3/3] fdt_support: add entry for sec3.1 and fix sec3.3 Add sec3.1 h/w geometry for fdt node fixups. Also, technically, whilst SEC v3.3 h/w honours the tls_ssl_stream descriptor type, it lacks the ARC4 algorithm execution unit required to be able to execute anything meaningful with it. Change the node to agree with the documentation that declares that the sec3.3 really doesn't have such a descriptor type. Reported-by: Haiying Wang Signed-off-by: Kim Phillips Signed-off-by: Kumar Gala --- common/fdt_support.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/common/fdt_support.c b/common/fdt_support.c index b6f252a87..a8ac617da 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -534,7 +534,8 @@ void fdt_fixup_crypto_node(void *blob, int sec_rev) { 0x0202, 1, 24, 0x04c, 0x0122003f }, /* SEC 2.2 */ { 0x0204, 4, 24, 0x07e, 0x012b0ebf }, /* SEC 2.4 */ { 0x0300, 4, 24, 0x9fe, 0x03ab0ebf }, /* SEC 3.0 */ - { 0x0303, 4, 24, 0x97c, 0x03ab0abf }, /* SEC 3.3 */ + { 0x0301, 4, 24, 0xbfe, 0x03ab0ebf }, /* SEC 3.1 */ + { 0x0303, 4, 24, 0x97c, 0x03a30abf }, /* SEC 3.3 */ }; char compat_strlist[ARRAY_SIZE(sec_rev_prop_list) * sizeof("fsl,secX.Y")];