AT91CAP9 support : board/ files
Signed-off-by: Stelian Pop <stelian@popies.net>
This commit is contained in:
Stelian Pop
Peter Pearse
parent
fefb6c1092
commit
6afcabf11d
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@ -0,0 +1,50 @@
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#
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# (C) Copyright 2003-2008
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# Wolfgang Denk, DENX Software Engineering, wd <at> denx.de.
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#
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# See file CREDITS for list of people who contributed to this
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# project.
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#
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# This program is free software; you can redistribute it and/or
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# modify it under the terms of the GNU General Public License as
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# published by the Free Software Foundation; either version 2 of
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# the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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# MA 02111-1307 USA
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#
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include $(TOPDIR)/config.mk
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LIB = $(obj)lib$(BOARD).a
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COBJS := at91cap9adk.o led.o nand.o
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SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
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OBJS := $(addprefix $(obj),$(COBJS))
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SOBJS := $(addprefix $(obj),$(SOBJS))
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$(LIB): $(obj).depend $(OBJS) $(SOBJS)
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$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
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clean:
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rm -f $(SOBJS) $(OBJS)
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distclean: clean
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rm -f $(LIB) core *.bak .depend
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#########################################################################
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# defines $(obj).depend target
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include $(SRCTREE)/rules.mk
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sinclude $(obj).depend
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#########################################################################
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@ -0,0 +1,283 @@
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/*
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* (C) Copyright 2007-2008
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* Stelian Pop <stelian.pop <at> leadtechdesign.com>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
|
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* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
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||||
* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/arch/AT91CAP9.h>
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#define MP_BLOCK_3_BASE 0xFDF00000
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DECLARE_GLOBAL_DATA_PTR;
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/* ------------------------------------------------------------------------- */
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/*
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* Miscelaneous platform dependent initialisations
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*/
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static void at91cap9_serial_hw_init(void)
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{
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#ifdef CONFIG_USART0
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AT91C_BASE_PIOA->PIO_PDR = AT91C_PA22_TXD0 | AT91C_PA23_RXD0;
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AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_US0;
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#endif
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#ifdef CONFIG_USART1
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AT91C_BASE_PIOD->PIO_PDR = AT91C_PD0_TXD1 | AT91C_PD1_RXD1;
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AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_US1;
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#endif
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#ifdef CONFIG_USART2
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AT91C_BASE_PIOD->PIO_PDR = AT91C_PD2_TXD2 | AT91C_PD3_RXD2;
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AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_US2;
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#endif
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#ifdef CONFIG_USART3 /* DBGU */
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AT91C_BASE_PIOC->PIO_PDR = AT91C_PC31_DTXD | AT91C_PC30_DRXD;
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AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SYS;
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#endif
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}
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static void at91cap9_nor_hw_init(void)
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{
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/* Ensure EBI supply is 3.3V */
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AT91C_BASE_CCFG->CCFG_EBICSA |= AT91C_EBI_SUP_3V3;
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/* Configure SMC CS0 for parallel flash */
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AT91C_BASE_SMC->SMC_SETUP0 = AT91C_FLASH_NWE_SETUP |
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AT91C_FLASH_NCS_WR_SETUP |
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AT91C_FLASH_NRD_SETUP |
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AT91C_FLASH_NCS_RD_SETUP;
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AT91C_BASE_SMC->SMC_PULSE0 = AT91C_FLASH_NWE_PULSE |
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AT91C_FLASH_NCS_WR_PULSE |
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AT91C_FLASH_NRD_PULSE |
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AT91C_FLASH_NCS_RD_PULSE;
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AT91C_BASE_SMC->SMC_CYCLE0 = AT91C_FLASH_NWE_CYCLE |
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AT91C_FLASH_NRD_CYCLE;
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AT91C_BASE_SMC->SMC_CTRL0 = AT91C_SMC_READMODE |
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AT91C_SMC_WRITEMODE |
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AT91C_SMC_NWAITM_NWAIT_DISABLE |
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AT91C_SMC_BAT_BYTE_WRITE |
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AT91C_SMC_DBW_WIDTH_SIXTEEN_BITS |
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(AT91C_SMC_TDF & (1 << 16));
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}
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#ifdef CONFIG_CMD_NAND
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static void at91cap9_nand_hw_init(void)
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{
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/* Enable CS3 */
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AT91C_BASE_CCFG->CCFG_EBICSA |= AT91C_EBI_CS3A_SM | AT91C_EBI_SUP_3V3;
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/* Configure SMC CS3 for NAND/SmartMedia */
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AT91C_BASE_SMC->SMC_SETUP3 = AT91C_SM_NWE_SETUP |
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AT91C_SM_NCS_WR_SETUP |
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AT91C_SM_NRD_SETUP |
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AT91C_SM_NCS_RD_SETUP;
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AT91C_BASE_SMC->SMC_PULSE3 = AT91C_SM_NWE_PULSE |
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AT91C_SM_NCS_WR_PULSE |
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AT91C_SM_NRD_PULSE |
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AT91C_SM_NCS_RD_PULSE;
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AT91C_BASE_SMC->SMC_CYCLE3 = AT91C_SM_NWE_CYCLE |
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AT91C_SM_NRD_CYCLE;
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AT91C_BASE_SMC->SMC_CTRL3 = AT91C_SMC_READMODE |
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AT91C_SMC_WRITEMODE |
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AT91C_SMC_NWAITM_NWAIT_DISABLE |
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AT91C_SMC_DBW_WIDTH_EIGTH_BITS |
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AT91C_SM_TDF;
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AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOABCD;
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/* RDY/BSY is not connected */
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/* Enable NandFlash */
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AT91C_BASE_PIOD->PIO_PER = AT91C_PIO_PD15;
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AT91C_BASE_PIOD->PIO_OER = AT91C_PIO_PD15;
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}
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#endif
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#ifdef CONFIG_HAS_DATAFLASH
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static void at91cap9_spi_hw_init(void)
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{
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AT91C_BASE_PIOD->PIO_BSR = AT91C_PD0_SPI0_NPCS2D |
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AT91C_PD1_SPI0_NPCS3D;
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AT91C_BASE_PIOD->PIO_PDR = AT91C_PD0_SPI0_NPCS2D |
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AT91C_PD1_SPI0_NPCS3D;
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AT91C_BASE_PIOA->PIO_ASR = AT91C_PA28_SPI0_NPCS3A;
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AT91C_BASE_PIOA->PIO_BSR = AT91C_PA4_SPI0_NPCS2A |
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AT91C_PA1_SPI0_MOSI |
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AT91C_PA0_SPI0_MISO |
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AT91C_PA3_SPI0_NPCS1 |
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AT91C_PA5_SPI0_NPCS0 |
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AT91C_PA2_SPI0_SPCK;
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AT91C_BASE_PIOA->PIO_PDR = AT91C_PA28_SPI0_NPCS3A |
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AT91C_PA4_SPI0_NPCS2A |
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AT91C_PA1_SPI0_MOSI |
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AT91C_PA0_SPI0_MISO |
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AT91C_PA3_SPI0_NPCS1 |
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AT91C_PA5_SPI0_NPCS0 |
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AT91C_PA2_SPI0_SPCK;
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/* Enable Clock */
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AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SPI0;
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}
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#endif
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#ifdef CONFIG_MACB
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static void at91cap9_macb_hw_init(void)
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{
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unsigned int gpio;
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/* Enable clock */
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AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_EMAC;
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/*
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* Disable pull-up on:
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* RXDV (PB22) => PHY normal mode (not Test mode)
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* ERX0 (PB25) => PHY ADDR0
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* ERX1 (PB26) => PHY ADDR1 => PHYADDR = 0x0
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*
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* PHY has internal pull-down
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*/
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AT91C_BASE_PIOB->PIO_PPUDR = AT91C_PB22_E_RXDV |
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AT91C_PB25_E_RX0 |
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AT91C_PB26_E_RX1;
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/* Need to reset PHY -> 500ms reset */
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AT91C_BASE_RSTC->RSTC_RMR = (AT91C_RSTC_KEY & (0xA5 << 24)) |
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(AT91C_RSTC_ERSTL & (0x0D << 8)) |
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AT91C_RSTC_URSTEN;
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AT91C_BASE_RSTC->RSTC_RCR = (AT91C_RSTC_KEY & (0xA5 << 24)) |
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AT91C_RSTC_EXTRST;
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/* Wait for end hardware reset */
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while (!(AT91C_BASE_RSTC->RSTC_RSR & AT91C_RSTC_NRSTL));
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/* Re-enable pull-up */
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AT91C_BASE_PIOB->PIO_PPUER = AT91C_PB22_E_RXDV |
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AT91C_PB25_E_RX0 |
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AT91C_PB26_E_RX1;
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#ifdef CONFIG_RMII
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gpio = AT91C_PB30_E_MDIO |
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AT91C_PB29_E_MDC |
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AT91C_PB21_E_TXCK |
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AT91C_PB27_E_RXER |
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AT91C_PB25_E_RX0 |
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AT91C_PB22_E_RXDV |
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AT91C_PB26_E_RX1 |
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AT91C_PB28_E_TXEN |
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AT91C_PB23_E_TX0 |
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AT91C_PB24_E_TX1;
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AT91C_BASE_PIOB->PIO_ASR = gpio;
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AT91C_BASE_PIOB->PIO_BSR = 0;
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AT91C_BASE_PIOB->PIO_PDR = gpio;
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#else
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#error AT91CAP9A-DK works only in RMII mode
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#endif
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/* Unlock EMAC, 3 0 2 1 sequence */
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#define MP_MAC_KEY0 0x5969cb2a
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#define MP_MAC_KEY1 0xb4a1872e
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#define MP_MAC_KEY2 0x05683fbc
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#define MP_MAC_KEY3 0x3634fba4
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#define UNLOCK_MAC 0x00000008
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*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x3c)) = MP_MAC_KEY3;
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*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x30)) = MP_MAC_KEY0;
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*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x38)) = MP_MAC_KEY2;
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*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x34)) = MP_MAC_KEY1;
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*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x40)) = UNLOCK_MAC;
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}
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#endif
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#ifdef CONFIG_USB_OHCI_NEW
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static void at91cap9_uhp_hw_init(void)
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{
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/* Unlock USB OHCI, 3 2 0 1 sequence */
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#define MP_OHCI_KEY0 0x896c11ca
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#define MP_OHCI_KEY1 0x68ebca21
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#define MP_OHCI_KEY2 0x4823efbc
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#define MP_OHCI_KEY3 0x8651aae4
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#define UNLOCK_OHCI 0x00000010
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*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x3c)) = MP_OHCI_KEY3;
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*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x38)) = MP_OHCI_KEY2;
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*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x30)) = MP_OHCI_KEY0;
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*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x34)) = MP_OHCI_KEY1;
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*((AT91_REG *)((AT91_REG) MP_BLOCK_3_BASE + 0x40)) = UNLOCK_OHCI;
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}
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#endif
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int board_init(void)
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{
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/* Enable Ctrlc */
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console_init_f();
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/* arch number of AT91CAP9ADK-Board */
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gd->bd->bi_arch_number = MACH_TYPE_AT91CAP9ADK;
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/* adress of boot parameters */
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gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
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at91cap9_serial_hw_init();
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at91cap9_nor_hw_init();
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#ifdef CONFIG_CMD_NAND
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at91cap9_nand_hw_init();
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#endif
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#ifdef CONFIG_HAS_DATAFLASH
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at91cap9_spi_hw_init();
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#endif
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#ifdef CONFIG_MACB
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at91cap9_macb_hw_init();
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#endif
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#ifdef CONFIG_USB_OHCI_NEW
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at91cap9_uhp_hw_init();
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#endif
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return 0;
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}
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int dram_init(void)
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{
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gd->bd->bi_dram[0].start = PHYS_SDRAM;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
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return 0;
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}
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#ifdef CONFIG_RESET_PHY_R
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void reset_phy(void)
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{
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#ifdef CONFIG_MACB
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/*
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* Initialize ethernet HW addr prior to starting Linux,
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* needed for nfsroot
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*/
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eth_init(gd->bd);
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#endif
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}
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#endif
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@ -0,0 +1 @@
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TEXT_BASE = 0x73000000
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@ -0,0 +1,80 @@
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/*
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* (C) Copyright 2007-2008
|
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* Stelian Pop <stelian.pop <at> leadtechdesign.com>
|
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* Lead Tech Design <www.leadtechdesign.com>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
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#include <asm/arch/AT91CAP9.h>
|
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#define RED_LED AT91C_PIO_PC29 /* this is the power led */
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#define GREEN_LED AT91C_PIO_PA10 /* this is the user1 led */
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#define YELLOW_LED AT91C_PIO_PA11 /* this is the user1 led */
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void red_LED_on(void)
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{
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AT91C_BASE_PIOC->PIO_SODR = RED_LED;
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}
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void red_LED_off(void)
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{
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AT91C_BASE_PIOC->PIO_CODR = RED_LED;
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}
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void green_LED_on(void)
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{
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AT91C_BASE_PIOA->PIO_CODR = GREEN_LED;
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}
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void green_LED_off(void)
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{
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AT91C_BASE_PIOA->PIO_SODR = GREEN_LED;
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}
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void yellow_LED_on(void)
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{
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AT91C_BASE_PIOA->PIO_CODR = YELLOW_LED;
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}
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void yellow_LED_off(void)
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{
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AT91C_BASE_PIOA->PIO_SODR = YELLOW_LED;
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}
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void coloured_LED_init(void)
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{
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/* Enable clock */
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AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_PIOABCD;
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/* Disable peripherals on LEDs */
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AT91C_BASE_PIOA->PIO_PER = GREEN_LED | YELLOW_LED;
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/* Enable pins as outputs */
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AT91C_BASE_PIOA->PIO_OER = GREEN_LED | YELLOW_LED;
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/* Turn all LEDs OFF */
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AT91C_BASE_PIOA->PIO_SODR = GREEN_LED | YELLOW_LED;
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/* Disable peripherals on LEDs */
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AT91C_BASE_PIOC->PIO_PER = RED_LED;
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/* Enable pins as outputs */
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AT91C_BASE_PIOC->PIO_OER = RED_LED;
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/* Turn all LEDs OFF */
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AT91C_BASE_PIOC->PIO_CODR = RED_LED;
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}
|
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|
|
@ -0,0 +1,71 @@
|
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/*
|
||||
* (C) Copyright 2007-2008
|
||||
* Stelian Pop <stelian.pop <at> leadtechdesign.com>
|
||||
* Lead Tech Design <www.leadtechdesign.com>
|
||||
*
|
||||
* (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
|
||||
#ifdef CONFIG_CMD_NAND
|
||||
|
||||
#include <nand.h>
|
||||
|
||||
/*
|
||||
* hardware specific access to control-lines
|
||||
*/
|
||||
#define MASK_ALE (1 << 21) /* our ALE is AD21 */
|
||||
#define MASK_CLE (1 << 22) /* our CLE is AD22 */
|
||||
|
||||
static void at91cap9adk_nand_hwcontrol(struct mtd_info *mtd, int cmd)
|
||||
{
|
||||
struct nand_chip *this = mtd->priv;
|
||||
ulong IO_ADDR_W = (ulong) this->IO_ADDR_W;
|
||||
|
||||
IO_ADDR_W &= ~(MASK_ALE|MASK_CLE);
|
||||
switch (cmd) {
|
||||
case NAND_CTL_SETCLE:
|
||||
IO_ADDR_W |= MASK_CLE;
|
||||
break;
|
||||
case NAND_CTL_SETALE:
|
||||
IO_ADDR_W |= MASK_ALE;
|
||||
break;
|
||||
case NAND_CTL_CLRNCE:
|
||||
AT91C_BASE_PIOD->PIO_SODR = AT91C_PIO_PD15;
|
||||
break;
|
||||
case NAND_CTL_SETNCE:
|
||||
AT91C_BASE_PIOD->PIO_CODR = AT91C_PIO_PD15;
|
||||
break;
|
||||
}
|
||||
this->IO_ADDR_W = (void *) IO_ADDR_W;
|
||||
}
|
||||
|
||||
int board_nand_init(struct nand_chip *nand)
|
||||
{
|
||||
nand->eccmode = NAND_ECC_SOFT;
|
||||
nand->hwcontrol = at91cap9adk_nand_hwcontrol;
|
||||
nand->chip_delay = 20;
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
|
@ -0,0 +1,57 @@
|
|||
/*
|
||||
* (C) Copyright 2002
|
||||
* Gary Jennejohn, DENX Software Engineering, <gj <at> denx.de>
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
|
||||
/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
|
||||
OUTPUT_ARCH(arm)
|
||||
ENTRY(_start)
|
||||
SECTIONS
|
||||
{
|
||||
. = 0x00000000;
|
||||
|
||||
. = ALIGN(4);
|
||||
.text :
|
||||
{
|
||||
cpu/arm926ejs/start.o (.text)
|
||||
*(.text)
|
||||
}
|
||||
|
||||
. = ALIGN(4);
|
||||
.rodata : { *(.rodata) }
|
||||
|
||||
. = ALIGN(4);
|
||||
.data : { *(.data) }
|
||||
|
||||
. = ALIGN(4);
|
||||
.got : { *(.got) }
|
||||
|
||||
. = .;
|
||||
__u_boot_cmd_start = .;
|
||||
.u_boot_cmd : { *(.u_boot_cmd) }
|
||||
__u_boot_cmd_end = .;
|
||||
|
||||
. = ALIGN(4);
|
||||
__bss_start = .;
|
||||
.bss : { *(.bss) }
|
||||
_end = .;
|
||||
}
|
||||
|
|
@ -0,0 +1,212 @@
|
|||
/*
|
||||
* (C) Copyright 2007
|
||||
* Stelian Pop <stelian.pop <at> leadtechdesign.com>
|
||||
* Lead Tech Design <www.leadtechdesign.com>
|
||||
*
|
||||
* Configuation settings for the AT91CAP9ADK board.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
/* ARM asynchronous clock */
|
||||
#define AT91C_MAIN_CLOCK 200000000 /* from 12 MHz crystal */
|
||||
#define AT91C_MASTER_CLOCK 100000000 /* peripheral = main / 2 */
|
||||
#define CFG_HZ 1000000 /* 1us resolution */
|
||||
|
||||
#define AT91_SLOW_CLOCK 32768 /* slow clock */
|
||||
|
||||
#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
|
||||
#define CONFIG_AT91CAP9 1 /* It's an Atmel AT91CAP9 SoC */
|
||||
#define CONFIG_AT91CAP9ADK 1 /* on an AT91CAP9ADK Board */
|
||||
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
|
||||
|
||||
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
|
||||
#define CONFIG_SETUP_MEMORY_TAGS 1
|
||||
#define CONFIG_INITRD_TAG 1
|
||||
|
||||
#define CONFIG_SKIP_LOWLEVEL_INIT
|
||||
#define CONFIG_SKIP_RELOCATE_UBOOT
|
||||
|
||||
#define ROUND(A, B) (((A) + (B)) & ~((B) - 1))
|
||||
/*
|
||||
* Size of malloc() pool
|
||||
*/
|
||||
#define CFG_MALLOC_LEN ROUND(CFG_ENV_SIZE + 128*1024, 0x1000)
|
||||
#define CFG_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
|
||||
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
|
||||
/*
|
||||
* Hardware drivers
|
||||
*/
|
||||
|
||||
#define CONFIG_ATMEL_USART 1
|
||||
#undef CONFIG_USART0
|
||||
#undef CONFIG_USART1
|
||||
#undef CONFIG_USART2
|
||||
#define CONFIG_USART3 1 /* USART 3 is DBGU */
|
||||
|
||||
#define CONFIG_BOOTDELAY 3
|
||||
#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
|
||||
"root=/dev/mtdblock1 rw rootfstype=jffs2"
|
||||
|
||||
/* #define CONFIG_ENV_OVERWRITE 1 */
|
||||
|
||||
/*
|
||||
* BOOTP options
|
||||
*/
|
||||
#define CONFIG_BOOTP_BOOTFILESIZE 1
|
||||
#define CONFIG_BOOTP_BOOTPATH 1
|
||||
#define CONFIG_BOOTP_GATEWAY 1
|
||||
#define CONFIG_BOOTP_HOSTNAME 1
|
||||
|
||||
/*
|
||||
* Command line configuration.
|
||||
*/
|
||||
#include <config_cmd_default.h>
|
||||
#undef CONFIG_CMD_BDI
|
||||
#undef CONFIG_CMD_IMI
|
||||
#undef CONFIG_CMD_AUTOSCRIPT
|
||||
#undef CONFIG_CMD_FPGA
|
||||
#undef CONFIG_CMD_LOADS
|
||||
|
||||
#define CONFIG_CMD_PING 1
|
||||
#define CONFIG_CMD_DHCP 1
|
||||
#define CONFIG_CMD_NAND 1
|
||||
#define CONFIG_CMD_USB 1
|
||||
|
||||
/* SDRAM: Careful: this supposes an AT91CAP-MEM33 expansion card */
|
||||
#define CONFIG_NR_DRAM_BANKS 1
|
||||
#define PHYS_SDRAM 0x70000000
|
||||
#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
|
||||
|
||||
/* DataFlash */
|
||||
#define CONFIG_HAS_DATAFLASH 1
|
||||
#define CFG_SPI_WRITE_TOUT (5*CFG_HZ)
|
||||
#define CFG_MAX_DATAFLASH_BANKS 1
|
||||
#define CFG_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
|
||||
#define CONFIG_NEW_PARTITION 1
|
||||
|
||||
/* NOR flash */
|
||||
#define CFG_FLASH_CFI 1
|
||||
#define CFG_FLASH_CFI_DRIVER 1
|
||||
#define PHYS_FLASH_1 0x10000000
|
||||
#define CFG_FLASH_BASE PHYS_FLASH_1
|
||||
#define CFG_MAX_FLASH_SECT 256
|
||||
#define CFG_MAX_FLASH_BANKS 1
|
||||
|
||||
#define AT91C_FLASH_NWE_SETUP (4 << 0)
|
||||
#define AT91C_FLASH_NCS_WR_SETUP (2 << 8)
|
||||
#define AT91C_FLASH_NRD_SETUP (4 << 16)
|
||||
#define AT91C_FLASH_NCS_RD_SETUP (2 << 24)
|
||||
|
||||
#define AT91C_FLASH_NWE_PULSE (8 << 0)
|
||||
#define AT91C_FLASH_NCS_WR_PULSE (10 << 8)
|
||||
#define AT91C_FLASH_NRD_PULSE (8 << 16)
|
||||
#define AT91C_FLASH_NCS_RD_PULSE (10 << 24)
|
||||
|
||||
#define AT91C_FLASH_NWE_CYCLE (16 << 0)
|
||||
#define AT91C_FLASH_NRD_CYCLE (16 << 16)
|
||||
|
||||
/* NAND flash */
|
||||
#define NAND_MAX_CHIPS 1
|
||||
#define CFG_MAX_NAND_DEVICE 1
|
||||
#define CFG_NAND_BASE 0x40000000
|
||||
|
||||
#define AT91C_SM_NWE_SETUP (2 << 0)
|
||||
#define AT91C_SM_NCS_WR_SETUP (1 << 8)
|
||||
#define AT91C_SM_NRD_SETUP (2 << 16)
|
||||
#define AT91C_SM_NCS_RD_SETUP (1 << 24)
|
||||
|
||||
#define AT91C_SM_NWE_PULSE (4 << 0)
|
||||
#define AT91C_SM_NCS_WR_PULSE (6 << 8)
|
||||
#define AT91C_SM_NRD_PULSE (4 << 16)
|
||||
#define AT91C_SM_NCS_RD_PULSE (6 << 24)
|
||||
|
||||
#define AT91C_SM_NWE_CYCLE (8 << 0)
|
||||
#define AT91C_SM_NRD_CYCLE (8 << 16)
|
||||
|
||||
#define AT91C_SM_TDF (1 << 16)
|
||||
|
||||
/* Ethernet */
|
||||
#define CONFIG_MACB 1
|
||||
#define CONFIG_RMII 1
|
||||
#define CONFIG_NET_MULTI 1
|
||||
#define CONFIG_NET_RETRY_COUNT 20
|
||||
#define CONFIG_RESET_PHY_R 1
|
||||
|
||||
/* USB */
|
||||
#define CONFIG_USB_OHCI_NEW 1
|
||||
#define LITTLEENDIAN 1
|
||||
#define CONFIG_DOS_PARTITION 1
|
||||
#define CFG_USB_OHCI_CPU_INIT 1
|
||||
#define CFG_USB_OHCI_REGS_BASE 0x00700000 /* AT91C_BASE_UHP */
|
||||
#define CFG_USB_OHCI_SLOT_NAME "at91cap9"
|
||||
#define CFG_USB_OHCI_MAX_ROOT_PORTS 2
|
||||
|
||||
|
||||
#define CFG_LOAD_ADDR 0x72000000 /* load address */
|
||||
|
||||
#define CFG_MEMTEST_START PHYS_SDRAM
|
||||
#define CFG_MEMTEST_END 0x73000000
|
||||
|
||||
#define CFG_USE_DATAFLASH 1
|
||||
#undef CFG_USE_NORFLASH
|
||||
|
||||
#ifdef CFG_USE_DATAFLASH
|
||||
|
||||
/* bootstrap + u-boot + env + linux in dataflash */
|
||||
#define CFG_ENV_IS_IN_DATAFLASH 1
|
||||
#define CFG_MONITOR_BASE (CFG_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
|
||||
#define CFG_ENV_OFFSET 0x4200
|
||||
#define CFG_ENV_ADDR (CFG_DATAFLASH_LOGIC_ADDR_CS0 + CFG_ENV_OFFSET)
|
||||
#define CFG_ENV_SIZE 0x4200
|
||||
#define CONFIG_BOOTCOMMAND "cp.b 0xC003DE00 0x72000000 0x200040; bootm"
|
||||
|
||||
#else
|
||||
|
||||
/* bootstrap + u-boot + env + linux in norflash */
|
||||
#define CFG_ENV_IS_IN_FLASH 1
|
||||
#define CFG_MONITOR_BASE (PHYS_FLASH_1 + 0x8000)
|
||||
#define CFG_ENV_OFFSET 0x4000
|
||||
#define CFG_ENV_ADDR (PHYS_FLASH_1 + CFG_ENV_OFFSET)
|
||||
#define CFG_ENV_SIZE 0x4000
|
||||
#define CONFIG_BOOTCOMMAND "cp.b 0x10040000 0x72000000 0x200000; bootm"
|
||||
|
||||
#endif
|
||||
|
||||
#define CFG_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
|
||||
|
||||
#define CFG_PROMPT "U-Boot> "
|
||||
#define CFG_CBSIZE 256
|
||||
#define CFG_MAXARGS 16
|
||||
#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
|
||||
#define CFG_LONGHELP 1
|
||||
#define CONFIG_CMDLINE_EDITING 1
|
||||
|
||||
#define CONFIG_STACKSIZE (32*1024) /* regular stack */
|
||||
|
||||
#ifdef CONFIG_USE_IRQ
|
||||
#error CONFIG_USE_IRQ not supported
|
||||
#endif
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue