Add handover support to calypso BTS
This commit is contained in:
parent
c736754345
commit
5fc544f901
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@ -313,6 +313,7 @@ struct l1ctl_bts_mode {
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uint8_t tx_mask;
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uint8_t tx_mask;
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uint8_t rx_mask;
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uint8_t rx_mask;
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uint8_t type[8];
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uint8_t type[8];
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uint8_t handover[8];
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uint8_t bsic;
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uint8_t bsic;
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uint16_t band_arfcn;
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uint16_t band_arfcn;
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uint8_t gain;
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uint8_t gain;
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@ -338,6 +339,7 @@ struct l1ctl_bts_burst_nb_ind {
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/* BTS mode: AB Burst Indication */
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/* BTS mode: AB Burst Indication */
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struct l1ctl_bts_burst_ab_ind {
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struct l1ctl_bts_burst_ab_ind {
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uint32_t fn;
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uint32_t fn;
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uint8_t tn;
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uint8_t toa;
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uint8_t toa;
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uint8_t iq[2*88];
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uint8_t iq[2*88];
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} __attribute__((packed));
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} __attribute__((packed));
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@ -117,7 +117,7 @@ l1ctl_tx_fbsb_req(struct l1ctl_link *l1l,
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int
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int
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l1ctl_tx_bts_mode(struct l1ctl_link *l1l, uint8_t enabled, uint8_t *type,
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l1ctl_tx_bts_mode(struct l1ctl_link *l1l, uint8_t enabled, uint8_t *type,
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uint8_t bsic, uint16_t band_arfcn, int gain, uint8_t tx_mask,
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uint8_t bsic, uint16_t band_arfcn, int gain, uint8_t tx_mask,
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uint8_t rx_mask)
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uint8_t rx_mask, uint8_t *handover)
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{
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{
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struct msgb *msg;
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struct msgb *msg;
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struct l1ctl_bts_mode *be;
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struct l1ctl_bts_mode *be;
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@ -142,6 +142,7 @@ l1ctl_tx_bts_mode(struct l1ctl_link *l1l, uint8_t enabled, uint8_t *type,
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be->gain = gain;
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be->gain = gain;
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be->tx_mask = tx_mask;
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be->tx_mask = tx_mask;
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be->rx_mask = rx_mask;
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be->rx_mask = rx_mask;
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memcpy(be->handover, handover, sizeof(be->handover));
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return l1l_send(l1l, msg);
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return l1l_send(l1l, msg);
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}
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}
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@ -252,7 +253,7 @@ _l1ctl_rx_bts_burst_ab_ind(struct l1ctl_link *l1l, struct msgb *msg)
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LOGP(DL1C, LOGL_INFO, "Access Burst Indication (fn=%d iq toa=%f)\n", fn, toa);
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LOGP(DL1C, LOGL_INFO, "Access Burst Indication (fn=%d iq toa=%f)\n", fn, toa);
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trx_data_ind(l1l->trx, fn, 0, data, toa, 0);
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trx_data_ind(l1l->trx, fn, bi->tn, data, toa, 0);
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exit:
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exit:
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msgb_free(msg);
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msgb_free(msg);
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@ -336,7 +337,7 @@ _l1ctl_rx_fbsb_conf(struct l1ctl_link *l1l, struct msgb *msg)
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} else {
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} else {
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LOGP(DAPP, LOGL_INFO, "Sync acquired, setting BTS mode ...\n");
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LOGP(DAPP, LOGL_INFO, "Sync acquired, setting BTS mode ...\n");
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l1l->sync = 1;
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l1l->sync = 1;
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l1ctl_tx_bts_mode(l1l, l1l->trx->power, l1l->trx->type, l1l->trx->bsic, l1l->trx->arfcn, l1l->trx->gain, l1l->tx_mask, l1l->rx_mask);
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l1ctl_tx_bts_mode(l1l, l1l->trx->power, l1l->trx->type, l1l->trx->bsic, l1l->trx->arfcn, l1l->trx->gain, l1l->tx_mask, l1l->rx_mask, l1l->trx->handover);
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}
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}
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rc = 0;
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rc = 0;
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@ -40,7 +40,7 @@ int l1ctl_tx_fbsb_req(struct l1ctl_link *l1l,
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uint8_t sync_info_idx, uint8_t ccch_mode);
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uint8_t sync_info_idx, uint8_t ccch_mode);
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int l1ctl_tx_bts_mode(struct l1ctl_link *l1l, uint8_t enabled, uint8_t *type,
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int l1ctl_tx_bts_mode(struct l1ctl_link *l1l, uint8_t enabled, uint8_t *type,
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uint8_t bsic, uint16_t band_arfcn, int gain, uint8_t tx_mask,
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uint8_t bsic, uint16_t band_arfcn, int gain, uint8_t tx_mask,
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uint8_t rx_mask);
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uint8_t rx_mask, uint8_t *handover);
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int l1ctl_tx_bts_burst_req(struct l1ctl_link *l1l,
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int l1ctl_tx_bts_burst_req(struct l1ctl_link *l1l,
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uint32_t fn, uint8_t tn, struct burst_data *burst);
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uint32_t fn, uint8_t tn, struct burst_data *burst);
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@ -236,7 +236,7 @@ _trx_ctrl_cmd_poweroff(struct trx *trx, const char *cmd, const char *args)
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trx->power = 0;
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trx->power = 0;
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for (i = 0; i < 8; i++)
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for (i = 0; i < 8; i++)
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if (trx->l1l[i])
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if (trx->l1l[i])
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l1ctl_tx_bts_mode(trx->l1l[i], 0, trx->type, 0, 0, 0, 0, 0);
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l1ctl_tx_bts_mode(trx->l1l[i], 0, trx->type, 0, 0, 0, 0, 0, trx->handover);
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return _trx_ctrl_send_resp(trx, cmd, "%d", 0);
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return _trx_ctrl_send_resp(trx, cmd, "%d", 0);
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}
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}
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@ -253,9 +253,10 @@ _trx_ctrl_cmd_poweron(struct trx *trx, const char *cmd, const char *args)
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rv = -EINVAL;
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rv = -EINVAL;
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} else {
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} else {
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trx->power = 1;
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trx->power = 1;
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memset(trx->handover, 0, sizeof(trx->handover));
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for (i = 0; i < 8; i++)
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for (i = 0; i < 8; i++)
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if (trx->l1l[i])
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if (trx->l1l[i])
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l1ctl_tx_bts_mode(trx->l1l[i], 1, trx->type, trx->bsic, trx->arfcn, trx->gain, trx->l1l[i]->tx_mask, trx->l1l[i]->rx_mask);
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l1ctl_tx_bts_mode(trx->l1l[i], 1, trx->type, trx->bsic, trx->arfcn, trx->gain, trx->l1l[i]->tx_mask, trx->l1l[i]->rx_mask, trx->handover);
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}
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}
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return _trx_ctrl_send_resp(trx, cmd, "%d", rv);
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return _trx_ctrl_send_resp(trx, cmd, "%d", rv);
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@ -302,7 +303,7 @@ _trx_ctrl_cmd_setrxgain(struct trx *trx, const char *cmd, const char *args)
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if (trx->power) {
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if (trx->power) {
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for (i = 0; i < 8; i++)
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for (i = 0; i < 8; i++)
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if (trx->l1l[i])
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if (trx->l1l[i])
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l1ctl_tx_bts_mode(trx->l1l[i], 1, trx->type, trx->bsic, trx->arfcn, trx->gain, trx->l1l[i]->tx_mask, trx->l1l[i]->rx_mask);
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l1ctl_tx_bts_mode(trx->l1l[i], 1, trx->type, trx->bsic, trx->arfcn, trx->gain, trx->l1l[i]->tx_mask, trx->l1l[i]->rx_mask, trx->handover);
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}
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}
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return _trx_ctrl_send_resp(trx, cmd, "%d %d", 0, db);
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return _trx_ctrl_send_resp(trx, cmd, "%d %d", 0, db);
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@ -337,7 +338,7 @@ _trx_ctrl_cmd_setslot(struct trx *trx, const char *cmd, const char *args)
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trx->type[tn] = type;
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trx->type[tn] = type;
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if (trx->l1l[tn])
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if (trx->l1l[tn])
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l1ctl_tx_bts_mode(trx->l1l[tn], 1, trx->type, trx->bsic, trx->arfcn, trx->gain, trx->l1l[tn]->tx_mask, trx->l1l[tn]->rx_mask);
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l1ctl_tx_bts_mode(trx->l1l[tn], 1, trx->type, trx->bsic, trx->arfcn, trx->gain, trx->l1l[tn]->tx_mask, trx->l1l[tn]->rx_mask, trx->handover);
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return _trx_ctrl_send_resp(trx, cmd, "%d %d", 0, type);
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return _trx_ctrl_send_resp(trx, cmd, "%d %d", 0, type);
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}
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}
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@ -395,6 +396,42 @@ done:
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return _trx_ctrl_send_resp(trx, cmd, "%d %d", rv, freq_khz);
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return _trx_ctrl_send_resp(trx, cmd, "%d %d", rv, freq_khz);
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}
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}
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static int
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_trx_ctrl_cmd_handover(struct trx *trx, const char *cmd, const char *args)
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{
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int n, tn, ss = 0;
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n = sscanf(args, "%d %d", &tn, &ss);
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if ((n < 1) || (tn < 0) || (tn > 7) || (ss < 0) || ((ss > 8)))
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return _trx_ctrl_send_resp(trx, cmd, "%d %d %d", -1, tn, ss);
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trx->handover[tn] |= (1 << ss);
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if (trx->l1l[tn])
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l1ctl_tx_bts_mode(trx->l1l[tn], 1, trx->type, trx->bsic, trx->arfcn, trx->gain, trx->l1l[tn]->tx_mask, trx->l1l[tn]->rx_mask, trx->handover);
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return _trx_ctrl_send_resp(trx, cmd, "%d %d %d", 0, tn, ss);
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}
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static int
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_trx_ctrl_cmd_nohandover(struct trx *trx, const char *cmd, const char *args)
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{
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int n, tn, ss = 0;
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n = sscanf(args, "%d %d", &tn, &ss);
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if ((n < 1) || (tn < 0) || (tn > 7) || (ss < 0) || ((ss > 8)))
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return _trx_ctrl_send_resp(trx, cmd, "%d %d %d", -1, tn, ss);
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trx->handover[tn] &= ~(1 << ss);
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if (trx->l1l[tn])
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l1ctl_tx_bts_mode(trx->l1l[tn], 1, trx->type, trx->bsic, trx->arfcn, trx->gain, trx->l1l[tn]->tx_mask, trx->l1l[tn]->rx_mask, trx->handover);
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return _trx_ctrl_send_resp(trx, cmd, "%d %d %d", 0, tn, ss);
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}
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struct trx_cmd_handler {
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struct trx_cmd_handler {
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const char *cmd;
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const char *cmd;
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int (*handler)(struct trx *trx, const char *cmd, const char *args);
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int (*handler)(struct trx *trx, const char *cmd, const char *args);
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@ -409,8 +446,11 @@ static const struct trx_cmd_handler trx_handlers[] = {
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{ "SETRXGAIN", _trx_ctrl_cmd_setrxgain },
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{ "SETRXGAIN", _trx_ctrl_cmd_setrxgain },
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{ "SETMAXDLY", _trx_ctrl_cmd_setmaxdly },
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{ "SETMAXDLY", _trx_ctrl_cmd_setmaxdly },
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{ "SETSLOT", _trx_ctrl_cmd_setslot },
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{ "SETSLOT", _trx_ctrl_cmd_setslot },
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{ "SETSLOT", _trx_ctrl_cmd_setslot },
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{ "RXTUNE", _trx_ctrl_cmd_rxtune },
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{ "RXTUNE", _trx_ctrl_cmd_rxtune },
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{ "TXTUNE", _trx_ctrl_cmd_txtune },
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{ "TXTUNE", _trx_ctrl_cmd_txtune },
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{ "HANDOVER", _trx_ctrl_cmd_handover },
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{ "NOHANDOVER", _trx_ctrl_cmd_nohandover },
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{ NULL, NULL }
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{ NULL, NULL }
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};
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};
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@ -54,6 +54,7 @@ struct trx {
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uint8_t bsic;
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uint8_t bsic;
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int gain;
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int gain;
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uint8_t type[8];
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uint8_t type[8];
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uint8_t handover[8];
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};
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};
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@ -89,6 +89,8 @@ APPLICATIONS?=hello_world compal_dsp_dump layer1 loader rssi trx
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# Applications specific env requirements
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# Applications specific env requirements
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APP_loader_ENVIRONMENTS=compalram highram
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APP_loader_ENVIRONMENTS=compalram highram
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APP_rssi_ENVIRONMENTS=* -compalram
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APP_rssi_ENVIRONMENTS=* -compalram
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APP_layer1_ENVIRONMENTS=* -compalram
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APP_trx_ENVIRONMENTS=* -compalram
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# Various objects that are currently linked into all applications
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# Various objects that are currently linked into all applications
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FLASH_OBJS=flash/cfi_flash.o
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FLASH_OBJS=flash/cfi_flash.o
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@ -160,6 +160,7 @@ struct l1s_state {
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uint8_t tx_start, tx_num;
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uint8_t tx_start, tx_num;
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uint8_t rx_start, rx_num;
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uint8_t rx_start, rx_num;
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uint8_t type[8];
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uint8_t type[8];
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uint8_t handover[8];
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uint16_t arfcn;
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uint16_t arfcn;
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uint8_t bsic;
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uint8_t bsic;
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uint8_t gain;
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uint8_t gain;
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@ -609,8 +609,10 @@ static int l1ctl_bts_mode(struct msgb *msg)
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mframe_enable(MF_TASK_BTS_SYNC);
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mframe_enable(MF_TASK_BTS_SYNC);
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mframe_enable(MF_TASK_BTS);
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mframe_enable(MF_TASK_BTS);
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for (i = 0; i < 8; i++)
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for (i = 0; i < 8; i++) {
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l1s.bts.type[i] = bm->type[i];
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l1s.bts.type[i] = bm->type[i];
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l1s.bts.handover[i] = bm->handover[i];
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}
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l1s.bts.gain = bm->gain;
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l1s.bts.gain = bm->gain;
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/* Calculate TX and RX windows by bit masks */
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/* Calculate TX and RX windows by bit masks */
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@ -117,6 +117,20 @@ sb_build(uint8_t bsic, uint16_t t1, uint8_t t2, uint8_t t3p)
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((bsic & 0x3f) << 2);
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((bsic & 0x3f) << 2);
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}
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}
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static uint8_t tchh_subslot[26] =
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{ 0,1,0,1,0,1,0,1,0,1,0,1,0,0,1,0,1,0,1,0,1,0,1,0,1,1 };
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static uint8_t sdcch4_subslot[102] =
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{ 3,3,3,3,0,0,2,2,2,2,3,3,3,3,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0,2,2,2,2,
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3,3,3,3,0,0,0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0,2,2,2,2 };
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static uint8_t sdcch8_subslot[102] =
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{ 5,5,5,5,6,6,6,6,7,7,7,7,0,0,0,0,0,0,0,1,1,1,1,2,2,2,
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2,3,3,3,3,4,4,4,4,5,5,5,5,6,6,6,6,7,7,7,7,0,0,0,0,
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1,1,1,1,2,2,2,2,3,3,3,3,0,0,0,0,0,0,0,1,1,1,1,2,2,2,
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2,3,3,3,3,4,4,4,4,5,5,5,5,6,6,6,6,7,7,7,7,4,4,4,4 };
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static int
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static int
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l1s_bts_resp(uint8_t p1, uint8_t p2, uint16_t p3)
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l1s_bts_resp(uint8_t p1, uint8_t p2, uint16_t p3)
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@ -135,17 +149,21 @@ l1s_bts_resp(uint8_t p1, uint8_t p2, uint16_t p3)
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/* Access Burst ? */
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/* Access Burst ? */
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if (db->rx[0].cmd == DSP_EXT_RX_CMD_AB)
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if (db->rx[0].cmd == DSP_EXT_RX_CMD_AB)
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{
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{
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static struct l1ctl_bts_burst_ab_ind _bi[51];
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static int burst_count = 0;
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static int energy[51];
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static struct l1ctl_bts_burst_ab_ind _bi[10];
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struct l1ctl_bts_burst_ab_ind *bi = &_bi[rx_time.t3];
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static int energy[10];
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struct l1ctl_bts_burst_ab_ind *bi = &_bi[burst_count];
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int i, j;
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int i, j;
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uint16_t *iq = &db->data[32];
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uint16_t *iq = &db->data[32];
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energy[rx_time.t3] = 0;
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energy[burst_count] = 0;
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/* Frame number */
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/* Frame number */
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bi->fn = htonl(rx_time.fn);
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bi->fn = htonl(rx_time.fn);
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/* Timeslot */
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bi->tn = l1s.bts.rx_start;
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/* Data (cut to 8 bits */
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/* Data (cut to 8 bits */
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bi->toa = db->rx[1].cmd;
|
bi->toa = db->rx[1].cmd;
|
||||||
if (bi->toa > 68)
|
if (bi->toa > 68)
|
||||||
|
@ -154,15 +172,17 @@ l1s_bts_resp(uint8_t p1, uint8_t p2, uint16_t p3)
|
||||||
bi->iq[i] = iq[j] >> 8;
|
bi->iq[i] = iq[j] >> 8;
|
||||||
|
|
||||||
/* energy */
|
/* energy */
|
||||||
energy[rx_time.t3] = db->rx[0].data;
|
energy[burst_count] = db->rx[0].data;
|
||||||
|
|
||||||
if (rx_time.t3 == 46) {
|
if (++burst_count == 10) {
|
||||||
struct msgb *msg;
|
struct msgb *msg;
|
||||||
int energy_max = 0, energy_avg = 0;
|
int energy_max = 0, energy_avg = 0;
|
||||||
|
|
||||||
/* find strongest burst */
|
burst_count = 0;
|
||||||
|
|
||||||
|
/* find strongest burst out of 10 */
|
||||||
j = 0;
|
j = 0;
|
||||||
for (i = 0; i < 51; i++) {
|
for (i = 0; i < 10; i++) {
|
||||||
energy_avg += energy[i];
|
energy_avg += energy[i];
|
||||||
if (energy[i] > energy_max) {
|
if (energy[i] > energy_max) {
|
||||||
energy_max = energy[i];
|
energy_max = energy[i];
|
||||||
|
@ -255,7 +275,7 @@ l1s_bts_cmd(uint8_t p1, uint8_t p2, uint16_t p3)
|
||||||
|
|
||||||
uint32_t sb;
|
uint32_t sb;
|
||||||
uint8_t data[15];
|
uint8_t data[15];
|
||||||
int type, i, t3;
|
int type, i, t3, fn_mod_26, fn_mod_102;
|
||||||
|
|
||||||
/* Enable extensions */
|
/* Enable extensions */
|
||||||
dsp_ext_api.ndb->active = 1;
|
dsp_ext_api.ndb->active = 1;
|
||||||
|
@ -276,20 +296,52 @@ l1s_bts_cmd(uint8_t p1, uint8_t p2, uint16_t p3)
|
||||||
{
|
{
|
||||||
/* We're really a frame in advance since we RX in the next frame ! */
|
/* We're really a frame in advance since we RX in the next frame ! */
|
||||||
t3 = t3 - 1;
|
t3 = t3 - 1;
|
||||||
|
fn_mod_26 = (l1s.next_time.fn + 2715648 - 1) % 26;
|
||||||
|
fn_mod_102 = (l1s.next_time.fn + 2715648 - 1) % 102;
|
||||||
|
|
||||||
/* Select which type of burst */
|
/* Select which type of burst */
|
||||||
if ((l1s.bts.type[l1s.bts.rx_start] >> 1) != 2) /* not type 4,5 */
|
switch (l1s.bts.type[l1s.bts.rx_start]) {
|
||||||
db->rx[0].cmd = DSP_EXT_RX_CMD_NB;
|
case 1: /* TCH/F */
|
||||||
else if (l1s.bts.type[0] == 4) /* type 4 */
|
if (l1s.bts.handover[l1s.bts.rx_start] & (1 << 0))
|
||||||
db->rx[0].cmd = DSP_EXT_RX_CMD_AB;
|
db->rx[0].cmd = DSP_EXT_RX_CMD_AB;
|
||||||
else if ((t3 >= 14) && (t3 <= 36))
|
else
|
||||||
db->rx[0].cmd = DSP_EXT_RX_CMD_AB;
|
db->rx[0].cmd = DSP_EXT_RX_CMD_NB;
|
||||||
else if ((t3 == 4) || (t3 == 5))
|
break;
|
||||||
db->rx[0].cmd = DSP_EXT_RX_CMD_AB;
|
case 2: /* TCH/H */
|
||||||
else if ((t3 == 45) || (t3 == 46))
|
case 3:
|
||||||
db->rx[0].cmd = DSP_EXT_RX_CMD_AB;
|
if ((l1s.bts.handover[l1s.bts.rx_start]
|
||||||
else
|
& (1 << tchh_subslot[fn_mod_26])))
|
||||||
|
db->rx[0].cmd = DSP_EXT_RX_CMD_AB;
|
||||||
|
else
|
||||||
|
db->rx[0].cmd = DSP_EXT_RX_CMD_NB;
|
||||||
|
break;
|
||||||
|
case 4:
|
||||||
|
case 6:
|
||||||
|
db->rx[0].cmd = DSP_EXT_RX_CMD_AB;
|
||||||
|
break;
|
||||||
|
case 5: /* BCCH+SDCCH/4 */
|
||||||
|
if ((t3 >= 14) && (t3 <= 36))
|
||||||
|
db->rx[0].cmd = DSP_EXT_RX_CMD_AB;
|
||||||
|
else if ((t3 == 4) || (t3 == 5))
|
||||||
|
db->rx[0].cmd = DSP_EXT_RX_CMD_AB;
|
||||||
|
else if ((t3 == 45) || (t3 == 46))
|
||||||
|
db->rx[0].cmd = DSP_EXT_RX_CMD_AB;
|
||||||
|
else if ((l1s.bts.handover[l1s.bts.rx_start]
|
||||||
|
& (1 << sdcch4_subslot[fn_mod_102])))
|
||||||
|
db->rx[0].cmd = DSP_EXT_RX_CMD_AB;
|
||||||
|
else
|
||||||
|
db->rx[0].cmd = DSP_EXT_RX_CMD_NB;
|
||||||
|
break;
|
||||||
|
case 7: /* SDCCH/8 */
|
||||||
|
if ((l1s.bts.handover[l1s.bts.rx_start]
|
||||||
|
& (1 << sdcch8_subslot[fn_mod_102])))
|
||||||
|
db->rx[0].cmd = DSP_EXT_RX_CMD_AB;
|
||||||
|
else
|
||||||
|
db->rx[0].cmd = DSP_EXT_RX_CMD_NB;
|
||||||
|
break;
|
||||||
|
default:
|
||||||
db->rx[0].cmd = DSP_EXT_RX_CMD_NB;
|
db->rx[0].cmd = DSP_EXT_RX_CMD_NB;
|
||||||
|
}
|
||||||
|
|
||||||
/* Enable dummy bursts detection */
|
/* Enable dummy bursts detection */
|
||||||
dsp_api.db_w->d_ctrl_system |= (1 << B_BCCH_FREQ_IND);
|
dsp_api.db_w->d_ctrl_system |= (1 << B_BCCH_FREQ_IND);
|
||||||
|
|
Loading…
Reference in New Issue