2017-07-04 13:55:12 +00:00
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/*
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* OsmocomBB <-> SDR connection bridge
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* TDMA scheduler: GSM PHY routines
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*
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* (C) 2017 by Vadim Yanitskiy <axilirator@gmail.com>
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*
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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*/
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#include <error.h>
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#include <errno.h>
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#include <string.h>
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#include <talloc.h>
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2017-12-17 22:47:28 +00:00
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#include <osmocom/gsm/a5.h>
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2017-07-04 13:55:12 +00:00
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#include <osmocom/core/bits.h>
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#include <osmocom/core/msgb.h>
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#include <osmocom/core/logging.h>
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#include <osmocom/core/linuxlist.h>
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#include "scheduler.h"
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#include "sched_trx.h"
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#include "trx_if.h"
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#include "logging.h"
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static void sched_frame_clck_cb(struct trx_sched *sched)
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{
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struct trx_instance *trx = (struct trx_instance *) sched->data;
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2017-07-12 11:48:18 +00:00
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const struct trx_frame *frame;
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2017-07-31 07:27:30 +00:00
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struct trx_lchan_state *lchan;
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2017-07-12 11:48:18 +00:00
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trx_lchan_tx_func *handler;
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enum trx_lchan_type chan;
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uint8_t offset, bid;
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struct trx_ts *ts;
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uint32_t fn;
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2017-07-28 08:47:41 +00:00
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int i;
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2017-07-04 13:55:12 +00:00
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2017-07-28 08:47:41 +00:00
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/* Iterate over timeslot list */
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for (i = 0; i < TRX_TS_COUNT; i++) {
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/* Timeslot is not allocated */
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ts = trx->ts_list[i];
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if (ts == NULL)
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continue;
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/* Timeslot is not configured */
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if (ts->mf_layout == NULL)
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continue;
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2017-07-04 13:55:12 +00:00
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2017-11-23 13:05:00 +00:00
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/**
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* Advance frame number, giving the transceiver more
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* time until a burst must be transmitted...
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*/
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fn = (sched->fn_counter_proc + sched->fn_counter_advance)
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% GSM_HYPERFRAME;
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2017-07-12 11:48:18 +00:00
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/* Get frame from multiframe */
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offset = fn % ts->mf_layout->period;
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frame = ts->mf_layout->frames + offset;
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/* Get required info from frame */
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bid = frame->ul_bid;
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chan = frame->ul_chan;
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handler = trx_lchan_desc[chan].tx_fn;
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/* Omit lchans without handler */
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if (!handler)
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continue;
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2017-07-31 07:27:30 +00:00
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/* Make sure that lchan was allocated and activated */
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lchan = sched_trx_find_lchan(ts, chan);
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if (lchan == NULL)
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continue;
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2018-03-10 21:20:57 +00:00
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/* Omit inactive lchans */
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if (!lchan->active)
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continue;
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2017-12-17 20:47:23 +00:00
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/**
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* If we aren't processing any primitive yet,
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* attempt to obtain a new one from queue
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*/
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if (lchan->prim == NULL)
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2018-08-12 21:45:22 +00:00
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lchan->prim = sched_prim_dequeue(&ts->tx_prims, fn, chan);
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2017-12-17 20:47:23 +00:00
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2018-03-10 21:18:06 +00:00
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/* TODO: report TX buffers health to the higher layers */
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/* If CBTX (Continuous Burst Transmission) is assumed */
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if (trx_lchan_desc[chan].flags & TRX_CH_FLAG_CBTX) {
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/**
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* Probably, a TX buffer is empty. Nevertheless,
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* we shall continuously transmit anything on
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* CBTX channels.
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*/
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if (lchan->prim == NULL)
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sched_prim_dummy(lchan);
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}
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2017-12-17 20:47:23 +00:00
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/* If there is no primitive, do nothing */
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if (lchan->prim == NULL)
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continue;
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2017-07-12 11:48:18 +00:00
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/* Poke lchan handler */
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2017-12-17 20:47:23 +00:00
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handler(trx, ts, lchan, fn, bid);
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2017-07-12 11:48:18 +00:00
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}
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2017-07-04 13:55:12 +00:00
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}
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2017-11-23 13:05:00 +00:00
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int sched_trx_init(struct trx_instance *trx, uint32_t fn_advance)
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2017-07-04 13:55:12 +00:00
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{
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struct trx_sched *sched;
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if (!trx)
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return -EINVAL;
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LOGP(DSCH, LOGL_NOTICE, "Init scheduler\n");
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/* Obtain a scheduler instance from TRX */
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sched = &trx->sched;
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/* Register frame clock callback */
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sched->clock_cb = sched_frame_clck_cb;
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/* Set pointers */
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sched = &trx->sched;
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sched->data = trx;
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2017-11-23 13:05:00 +00:00
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/* Set frame counter advance */
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sched->fn_counter_advance = fn_advance;
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2017-07-04 13:55:12 +00:00
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return 0;
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}
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int sched_trx_shutdown(struct trx_instance *trx)
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{
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int i;
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if (!trx)
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return -EINVAL;
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LOGP(DSCH, LOGL_NOTICE, "Shutdown scheduler\n");
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/* Free all potentially allocated timeslots */
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for (i = 0; i < TRX_TS_COUNT; i++)
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sched_trx_del_ts(trx, i);
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return 0;
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}
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2017-07-27 10:53:09 +00:00
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int sched_trx_reset(struct trx_instance *trx, int reset_clock)
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2017-07-04 13:55:12 +00:00
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{
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int i;
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if (!trx)
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return -EINVAL;
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2017-07-27 10:53:09 +00:00
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LOGP(DSCH, LOGL_NOTICE, "Reset scheduler %s\n",
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reset_clock ? "and clock counter" : "");
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2017-07-04 13:55:12 +00:00
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/* Free all potentially allocated timeslots */
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for (i = 0; i < TRX_TS_COUNT; i++)
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sched_trx_del_ts(trx, i);
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2017-07-27 10:53:09 +00:00
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/* Stop and reset clock counter if required */
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if (reset_clock)
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sched_clck_reset(&trx->sched);
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2017-07-27 02:57:13 +00:00
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2017-07-04 13:55:12 +00:00
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return 0;
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}
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2017-07-28 08:47:41 +00:00
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struct trx_ts *sched_trx_add_ts(struct trx_instance *trx, int tn)
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2017-07-04 13:55:12 +00:00
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{
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2017-07-28 08:47:41 +00:00
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/* Make sure that ts isn't allocated yet */
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if (trx->ts_list[tn] != NULL) {
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LOGP(DSCH, LOGL_ERROR, "Timeslot #%u already allocated\n", tn);
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return NULL;
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}
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2017-07-04 13:55:12 +00:00
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2017-07-28 08:47:41 +00:00
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LOGP(DSCH, LOGL_NOTICE, "Add a new TDMA timeslot #%u\n", tn);
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2017-07-04 13:55:12 +00:00
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2017-07-28 08:47:41 +00:00
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/* Allocate a new one */
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trx->ts_list[tn] = talloc_zero(trx, struct trx_ts);
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2017-07-04 13:55:12 +00:00
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2017-07-28 08:47:41 +00:00
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/* Assign TS index */
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trx->ts_list[tn]->index = tn;
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2017-07-04 13:55:12 +00:00
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2017-07-28 08:47:41 +00:00
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return trx->ts_list[tn];
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2017-07-04 13:55:12 +00:00
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}
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2017-07-28 08:47:41 +00:00
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void sched_trx_del_ts(struct trx_instance *trx, int tn)
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2017-07-04 13:55:12 +00:00
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{
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2018-03-09 08:33:59 +00:00
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struct trx_lchan_state *lchan, *lchan_next;
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2017-07-04 13:55:12 +00:00
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struct trx_ts *ts;
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/* Find ts in list */
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2017-07-28 08:47:41 +00:00
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ts = trx->ts_list[tn];
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2017-07-04 13:55:12 +00:00
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if (ts == NULL)
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return;
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2017-07-28 08:47:41 +00:00
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LOGP(DSCH, LOGL_NOTICE, "Delete TDMA timeslot #%u\n", tn);
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2017-07-04 13:55:12 +00:00
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2018-01-04 02:17:51 +00:00
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/* Deactivate all logical channels */
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sched_trx_deactivate_all_lchans(ts);
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/* Free channel states */
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2018-03-09 08:33:59 +00:00
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llist_for_each_entry_safe(lchan, lchan_next, &ts->lchans, list) {
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llist_del(&lchan->list);
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2018-01-05 00:24:04 +00:00
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talloc_free(lchan);
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2018-03-09 08:33:59 +00:00
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}
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2018-01-04 02:17:51 +00:00
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2017-07-04 13:55:12 +00:00
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/* Flush queue primitives for TX */
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2017-12-17 19:13:41 +00:00
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sched_prim_flush_queue(&ts->tx_prims);
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2017-07-04 13:55:12 +00:00
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2017-07-28 08:47:41 +00:00
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/* Remove ts from list and free memory */
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trx->ts_list[tn] = NULL;
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2017-07-04 13:55:12 +00:00
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talloc_free(ts);
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2017-07-14 02:18:03 +00:00
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/* Notify transceiver about that */
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2017-07-28 08:47:41 +00:00
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trx_if_cmd_setslot(trx, tn, 0);
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2017-07-04 13:55:12 +00:00
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}
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2018-01-05 00:24:04 +00:00
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#define LAYOUT_HAS_LCHAN(layout, lchan) \
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(layout->lchan_mask & ((uint64_t) 0x01 << lchan))
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2017-07-28 08:47:41 +00:00
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int sched_trx_configure_ts(struct trx_instance *trx, int tn,
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2017-07-04 13:55:12 +00:00
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enum gsm_phys_chan_config config)
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{
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2018-01-05 00:24:04 +00:00
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struct trx_lchan_state *lchan;
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enum trx_lchan_type type;
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2017-07-04 13:55:12 +00:00
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struct trx_ts *ts;
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/* Try to find specified ts */
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2017-07-28 08:47:41 +00:00
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ts = trx->ts_list[tn];
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2017-07-04 13:55:12 +00:00
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if (ts != NULL) {
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/* Reconfiguration of existing one */
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2017-07-28 08:47:41 +00:00
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sched_trx_reset_ts(trx, tn);
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2017-07-04 13:55:12 +00:00
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} else {
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/* Allocate a new one if doesn't exist */
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2017-07-28 08:47:41 +00:00
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ts = sched_trx_add_ts(trx, tn);
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2017-07-04 13:55:12 +00:00
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if (ts == NULL)
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return -ENOMEM;
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}
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/* Choose proper multiframe layout */
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2017-07-28 08:47:41 +00:00
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ts->mf_layout = sched_mframe_layout(config, tn);
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2017-07-04 13:55:12 +00:00
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if (ts->mf_layout->chan_config != config)
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return -EINVAL;
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2017-07-26 14:28:01 +00:00
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LOGP(DSCH, LOGL_NOTICE, "(Re)configure TDMA timeslot #%u as %s\n",
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2017-07-28 08:47:41 +00:00
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tn, ts->mf_layout->name);
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2017-07-04 13:55:12 +00:00
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2018-01-05 00:24:04 +00:00
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/* Init queue primitives for TX */
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INIT_LLIST_HEAD(&ts->tx_prims);
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/* Init logical channels list */
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INIT_LLIST_HEAD(&ts->lchans);
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2017-07-04 13:55:12 +00:00
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/* Allocate channel states */
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2018-01-05 00:24:04 +00:00
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for (type = 0; type < _TRX_CHAN_MAX; type++) {
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if (!LAYOUT_HAS_LCHAN(ts->mf_layout, type))
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continue;
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/* Allocate a channel state */
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lchan = talloc_zero(ts, struct trx_lchan_state);
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if (!lchan)
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return -ENOMEM;
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/* Set channel type */
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lchan->type = type;
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/* Add to the list of channel states */
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llist_add_tail(&lchan->list, &ts->lchans);
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/* Enable channel automatically if required */
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if (trx_lchan_desc[type].flags & TRX_CH_FLAG_AUTO)
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sched_trx_activate_lchan(ts, type);
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2017-07-04 13:55:12 +00:00
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}
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2017-07-14 02:18:03 +00:00
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/* Notify transceiver about TS activation */
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/* FIXME: set proper channel type */
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2017-07-28 08:47:41 +00:00
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trx_if_cmd_setslot(trx, tn, 1);
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2017-07-14 02:18:03 +00:00
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2017-07-04 13:55:12 +00:00
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return 0;
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}
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2017-07-28 08:47:41 +00:00
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int sched_trx_reset_ts(struct trx_instance *trx, int tn)
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2017-07-04 13:55:12 +00:00
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{
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2018-01-05 00:24:04 +00:00
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struct trx_lchan_state *lchan, *lchan_next;
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2017-07-04 13:55:12 +00:00
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struct trx_ts *ts;
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/* Try to find specified ts */
|
2017-07-28 08:47:41 +00:00
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ts = trx->ts_list[tn];
|
2017-07-04 13:55:12 +00:00
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if (ts == NULL)
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return -EINVAL;
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2017-07-08 14:03:22 +00:00
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/* Flush TS frame counter */
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2017-07-04 13:55:12 +00:00
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ts->mf_last_fn = 0;
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/* Undefine multiframe layout */
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ts->mf_layout = NULL;
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|
|
/* Flush queue primitives for TX */
|
2017-12-17 19:13:41 +00:00
|
|
|
sched_prim_flush_queue(&ts->tx_prims);
|
2017-07-04 13:55:12 +00:00
|
|
|
|
2018-01-04 02:17:51 +00:00
|
|
|
/* Deactivate all logical channels */
|
|
|
|
sched_trx_deactivate_all_lchans(ts);
|
|
|
|
|
2017-07-04 13:55:12 +00:00
|
|
|
/* Free channel states */
|
2018-01-05 00:24:04 +00:00
|
|
|
llist_for_each_entry_safe(lchan, lchan_next, &ts->lchans, list) {
|
|
|
|
llist_del(&lchan->list);
|
|
|
|
talloc_free(lchan);
|
|
|
|
}
|
2017-07-04 13:55:12 +00:00
|
|
|
|
2017-07-14 02:18:03 +00:00
|
|
|
/* Notify transceiver about that */
|
2017-07-28 08:47:41 +00:00
|
|
|
trx_if_cmd_setslot(trx, tn, 0);
|
2017-07-14 02:18:03 +00:00
|
|
|
|
2017-07-04 13:55:12 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-12-17 22:47:28 +00:00
|
|
|
int sched_trx_start_ciphering(struct trx_ts *ts, uint8_t algo,
|
|
|
|
uint8_t *key, uint8_t key_len)
|
|
|
|
{
|
2018-01-05 00:24:04 +00:00
|
|
|
struct trx_lchan_state *lchan;
|
2017-12-17 22:47:28 +00:00
|
|
|
|
|
|
|
/* Prevent NULL-pointer deference */
|
|
|
|
if (!ts)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
/* Make sure we can store this key */
|
|
|
|
if (key_len > MAX_A5_KEY_LEN)
|
|
|
|
return -ERANGE;
|
|
|
|
|
|
|
|
/* Iterate over all allocated logical channels */
|
2018-01-05 00:24:04 +00:00
|
|
|
llist_for_each_entry(lchan, &ts->lchans, list) {
|
|
|
|
/* Omit inactive channels */
|
|
|
|
if (!lchan->active)
|
|
|
|
continue;
|
|
|
|
|
2017-12-17 22:47:28 +00:00
|
|
|
/* Set key length and algorithm */
|
2018-01-05 00:24:04 +00:00
|
|
|
lchan->a5.key_len = key_len;
|
|
|
|
lchan->a5.algo = algo;
|
2017-12-17 22:47:28 +00:00
|
|
|
|
|
|
|
/* Copy requested key */
|
|
|
|
if (key_len)
|
2018-01-05 00:24:04 +00:00
|
|
|
memcpy(lchan->a5.key, key, key_len);
|
2017-12-17 22:47:28 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-07-04 13:55:12 +00:00
|
|
|
struct trx_lchan_state *sched_trx_find_lchan(struct trx_ts *ts,
|
|
|
|
enum trx_lchan_type chan)
|
|
|
|
{
|
2018-01-05 00:24:04 +00:00
|
|
|
struct trx_lchan_state *lchan;
|
2017-07-04 13:55:12 +00:00
|
|
|
|
2018-01-05 00:24:04 +00:00
|
|
|
llist_for_each_entry(lchan, &ts->lchans, list)
|
|
|
|
if (lchan->type == chan)
|
|
|
|
return lchan;
|
2017-07-04 13:55:12 +00:00
|
|
|
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2018-04-02 17:57:55 +00:00
|
|
|
int sched_trx_set_lchans(struct trx_ts *ts, uint8_t chan_nr, int active, uint8_t tch_mode)
|
2017-07-29 17:43:52 +00:00
|
|
|
{
|
|
|
|
const struct trx_lchan_desc *lchan_desc;
|
|
|
|
struct trx_lchan_state *lchan;
|
2018-01-05 00:24:04 +00:00
|
|
|
int rc = 0;
|
2017-07-29 17:43:52 +00:00
|
|
|
|
|
|
|
/* Prevent NULL-pointer deference */
|
2018-01-05 00:24:04 +00:00
|
|
|
if (ts == NULL) {
|
2017-07-29 17:43:52 +00:00
|
|
|
LOGP(DSCH, LOGL_ERROR, "Timeslot isn't configured\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Iterate over all allocated lchans */
|
2018-01-05 00:24:04 +00:00
|
|
|
llist_for_each_entry(lchan, &ts->lchans, list) {
|
2017-07-29 17:43:52 +00:00
|
|
|
lchan_desc = &trx_lchan_desc[lchan->type];
|
|
|
|
|
|
|
|
if (lchan_desc->chan_nr == (chan_nr & 0xf8)) {
|
2018-04-02 17:57:55 +00:00
|
|
|
if (active) {
|
2017-07-29 17:43:52 +00:00
|
|
|
rc |= sched_trx_activate_lchan(ts, lchan->type);
|
2018-04-02 17:57:55 +00:00
|
|
|
lchan->tch_mode = tch_mode;
|
|
|
|
} else
|
2017-07-29 17:43:52 +00:00
|
|
|
rc |= sched_trx_deactivate_lchan(ts, lchan->type);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2017-07-04 13:55:12 +00:00
|
|
|
int sched_trx_activate_lchan(struct trx_ts *ts, enum trx_lchan_type chan)
|
|
|
|
{
|
|
|
|
const struct trx_lchan_desc *lchan_desc = &trx_lchan_desc[chan];
|
|
|
|
struct trx_lchan_state *lchan;
|
|
|
|
|
|
|
|
/* Try to find requested logical channel */
|
|
|
|
lchan = sched_trx_find_lchan(ts, chan);
|
|
|
|
if (lchan == NULL)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (lchan->active) {
|
|
|
|
LOGP(DSCH, LOGL_ERROR, "Logical channel %s already activated "
|
|
|
|
"on ts=%d\n", trx_lchan_desc[chan].name, ts->index);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2017-07-29 17:43:52 +00:00
|
|
|
LOGP(DSCH, LOGL_NOTICE, "Activating lchan=%s "
|
|
|
|
"on ts=%d\n", trx_lchan_desc[chan].name, ts->index);
|
|
|
|
|
2017-07-04 13:55:12 +00:00
|
|
|
/* Conditionally allocate memory for bursts */
|
|
|
|
if (lchan_desc->rx_fn && lchan_desc->burst_buf_size > 0) {
|
2018-01-05 00:24:04 +00:00
|
|
|
lchan->rx_bursts = talloc_zero_size(lchan,
|
2017-07-04 13:55:12 +00:00
|
|
|
lchan_desc->burst_buf_size);
|
|
|
|
if (lchan->rx_bursts == NULL)
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (lchan_desc->tx_fn && lchan_desc->burst_buf_size > 0) {
|
2018-01-05 00:24:04 +00:00
|
|
|
lchan->tx_bursts = talloc_zero_size(lchan,
|
2017-07-04 13:55:12 +00:00
|
|
|
lchan_desc->burst_buf_size);
|
|
|
|
if (lchan->tx_bursts == NULL)
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Finally, update channel status */
|
|
|
|
lchan->active = 1;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2018-01-04 00:26:34 +00:00
|
|
|
static void sched_trx_reset_lchan(struct trx_lchan_state *lchan)
|
|
|
|
{
|
|
|
|
/* Prevent NULL-pointer deference */
|
|
|
|
OSMO_ASSERT(lchan != NULL);
|
|
|
|
|
|
|
|
/* Reset internal state variables */
|
|
|
|
lchan->rx_burst_mask = 0x00;
|
|
|
|
lchan->tx_burst_mask = 0x00;
|
|
|
|
lchan->rx_first_fn = 0;
|
|
|
|
|
|
|
|
/* Free burst memory */
|
|
|
|
talloc_free(lchan->rx_bursts);
|
|
|
|
talloc_free(lchan->tx_bursts);
|
|
|
|
|
|
|
|
lchan->rx_bursts = NULL;
|
|
|
|
lchan->tx_bursts = NULL;
|
|
|
|
|
|
|
|
/* Forget the current prim */
|
|
|
|
sched_prim_drop(lchan);
|
|
|
|
|
|
|
|
/* TCH specific variables */
|
|
|
|
if (CHAN_IS_TCH(lchan->type)) {
|
|
|
|
lchan->dl_ongoing_facch = 0;
|
|
|
|
lchan->ul_ongoing_facch = 0;
|
|
|
|
|
|
|
|
lchan->rsl_cmode = 0x00;
|
|
|
|
lchan->tch_mode = 0x00;
|
|
|
|
|
|
|
|
/* Reset AMR state */
|
|
|
|
memset(&lchan->amr, 0x00, sizeof(lchan->amr));
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Reset ciphering state */
|
|
|
|
memset(&lchan->a5, 0x00, sizeof(lchan->a5));
|
|
|
|
}
|
|
|
|
|
2017-07-04 13:55:12 +00:00
|
|
|
int sched_trx_deactivate_lchan(struct trx_ts *ts, enum trx_lchan_type chan)
|
|
|
|
{
|
|
|
|
struct trx_lchan_state *lchan;
|
|
|
|
|
|
|
|
/* Try to find requested logical channel */
|
|
|
|
lchan = sched_trx_find_lchan(ts, chan);
|
|
|
|
if (lchan == NULL)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2017-07-08 12:39:14 +00:00
|
|
|
if (!lchan->active) {
|
2017-07-04 13:55:12 +00:00
|
|
|
LOGP(DSCH, LOGL_ERROR, "Logical channel %s already deactivated "
|
2017-07-08 12:39:14 +00:00
|
|
|
"on ts=%d\n", trx_lchan_desc[chan].name, ts->index);
|
2017-07-04 13:55:12 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2017-07-29 17:43:52 +00:00
|
|
|
LOGP(DSCH, LOGL_DEBUG, "Deactivating lchan=%s "
|
|
|
|
"on ts=%d\n", trx_lchan_desc[chan].name, ts->index);
|
|
|
|
|
2018-01-04 00:26:34 +00:00
|
|
|
/* Reset internal state, free memory */
|
|
|
|
sched_trx_reset_lchan(lchan);
|
2017-12-17 20:47:23 +00:00
|
|
|
|
2018-01-04 00:26:34 +00:00
|
|
|
/* Update activation flag */
|
2017-07-04 13:55:12 +00:00
|
|
|
lchan->active = 0;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
2017-07-04 14:12:25 +00:00
|
|
|
|
2017-07-15 08:20:35 +00:00
|
|
|
void sched_trx_deactivate_all_lchans(struct trx_ts *ts)
|
|
|
|
{
|
|
|
|
struct trx_lchan_state *lchan;
|
|
|
|
|
2017-07-29 17:43:52 +00:00
|
|
|
LOGP(DSCH, LOGL_DEBUG, "Deactivating all logical channels "
|
|
|
|
"on ts=%d\n", ts->index);
|
|
|
|
|
2018-01-05 00:24:04 +00:00
|
|
|
llist_for_each_entry(lchan, &ts->lchans, list) {
|
2018-01-04 00:26:34 +00:00
|
|
|
/* Omit inactive channels */
|
|
|
|
if (!lchan->active)
|
|
|
|
continue;
|
2017-07-15 08:20:35 +00:00
|
|
|
|
2018-01-04 00:26:34 +00:00
|
|
|
/* Reset internal state, free memory */
|
|
|
|
sched_trx_reset_lchan(lchan);
|
2017-12-17 20:47:23 +00:00
|
|
|
|
2018-01-04 00:26:34 +00:00
|
|
|
/* Update activation flag */
|
2017-07-15 08:20:35 +00:00
|
|
|
lchan->active = 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
enum gsm_phys_chan_config sched_trx_chan_nr2pchan_config(uint8_t chan_nr)
|
|
|
|
{
|
|
|
|
uint8_t cbits = chan_nr >> 3;
|
|
|
|
|
|
|
|
if (cbits == 0x01)
|
|
|
|
return GSM_PCHAN_TCH_F;
|
|
|
|
else if ((cbits & 0x1e) == 0x02)
|
|
|
|
return GSM_PCHAN_TCH_H;
|
|
|
|
else if ((cbits & 0x1c) == 0x04)
|
|
|
|
return GSM_PCHAN_CCCH_SDCCH4;
|
|
|
|
else if ((cbits & 0x18) == 0x08)
|
|
|
|
return GSM_PCHAN_SDCCH8_SACCH8C;
|
|
|
|
|
|
|
|
return GSM_PCHAN_NONE;
|
|
|
|
}
|
|
|
|
|
2017-07-29 17:43:52 +00:00
|
|
|
enum trx_lchan_type sched_trx_chan_nr2lchan_type(uint8_t chan_nr,
|
|
|
|
uint8_t link_id)
|
2017-07-15 08:20:35 +00:00
|
|
|
{
|
2017-07-29 17:43:52 +00:00
|
|
|
int i;
|
2017-07-15 08:20:35 +00:00
|
|
|
|
2017-07-29 17:43:52 +00:00
|
|
|
/* Iterate over all known lchan types */
|
|
|
|
for (i = 0; i < _TRX_CHAN_MAX; i++)
|
|
|
|
if (trx_lchan_desc[i].chan_nr == (chan_nr & 0xf8))
|
|
|
|
if (trx_lchan_desc[i].link_id == link_id)
|
|
|
|
return i;
|
2017-07-15 08:20:35 +00:00
|
|
|
|
|
|
|
return TRXC_IDLE;
|
|
|
|
}
|
|
|
|
|
2017-12-17 22:47:28 +00:00
|
|
|
static void sched_trx_a5_burst_dec(struct trx_lchan_state *lchan,
|
|
|
|
uint32_t fn, sbit_t *burst)
|
|
|
|
{
|
|
|
|
ubit_t ks[114];
|
|
|
|
int i;
|
|
|
|
|
|
|
|
/* Generate keystream for a DL burst */
|
|
|
|
osmo_a5(lchan->a5.algo, lchan->a5.key, fn, ks, NULL);
|
|
|
|
|
|
|
|
/* Apply keystream over ciphertext */
|
|
|
|
for (i = 0; i < 57; i++) {
|
|
|
|
if (ks[i])
|
|
|
|
burst[i + 3] *= -1;
|
|
|
|
if (ks[i + 57])
|
|
|
|
burst[i + 88] *= -1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void sched_trx_a5_burst_enc(struct trx_lchan_state *lchan,
|
|
|
|
uint32_t fn, ubit_t *burst)
|
|
|
|
{
|
|
|
|
ubit_t ks[114];
|
|
|
|
int i;
|
|
|
|
|
|
|
|
/* Generate keystream for an UL burst */
|
|
|
|
osmo_a5(lchan->a5.algo, lchan->a5.key, fn, NULL, ks);
|
|
|
|
|
|
|
|
/* Apply keystream over plaintext */
|
|
|
|
for (i = 0; i < 57; i++) {
|
|
|
|
burst[i + 3] ^= ks[i];
|
|
|
|
burst[i + 88] ^= ks[i + 57];
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-07-28 08:47:41 +00:00
|
|
|
int sched_trx_handle_rx_burst(struct trx_instance *trx, uint8_t tn,
|
2018-03-02 14:24:57 +00:00
|
|
|
uint32_t burst_fn, sbit_t *bits, uint16_t nbits,
|
|
|
|
int8_t rssi, int16_t toa256)
|
2017-07-04 14:12:25 +00:00
|
|
|
{
|
|
|
|
struct trx_lchan_state *lchan;
|
|
|
|
const struct trx_frame *frame;
|
|
|
|
struct trx_ts *ts;
|
|
|
|
|
|
|
|
trx_lchan_rx_func *handler;
|
|
|
|
enum trx_lchan_type chan;
|
|
|
|
uint32_t fn, elapsed;
|
|
|
|
uint8_t offset, bid;
|
|
|
|
|
2017-07-28 09:00:40 +00:00
|
|
|
/* Check whether required timeslot is allocated and configured */
|
2017-07-28 09:15:05 +00:00
|
|
|
ts = trx->ts_list[tn];
|
2017-07-28 09:00:40 +00:00
|
|
|
if (ts == NULL || ts->mf_layout == NULL) {
|
2017-08-19 06:38:24 +00:00
|
|
|
LOGP(DSCHD, LOGL_DEBUG, "TDMA timeslot #%u isn't configured, "
|
2017-07-28 08:47:41 +00:00
|
|
|
"ignoring burst...\n", tn);
|
2017-07-04 14:12:25 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Calculate how many frames have been elapsed */
|
|
|
|
elapsed = (burst_fn + GSM_HYPERFRAME - ts->mf_last_fn);
|
|
|
|
elapsed %= GSM_HYPERFRAME;
|
|
|
|
|
|
|
|
/**
|
|
|
|
* If not too many frames have been elapsed,
|
|
|
|
* start counting from last fn + 1
|
|
|
|
*/
|
|
|
|
if (elapsed < 10)
|
|
|
|
fn = (ts->mf_last_fn + 1) % GSM_HYPERFRAME;
|
|
|
|
else
|
|
|
|
fn = burst_fn;
|
|
|
|
|
|
|
|
while (1) {
|
|
|
|
/* Get frame from multiframe */
|
|
|
|
offset = fn % ts->mf_layout->period;
|
|
|
|
frame = ts->mf_layout->frames + offset;
|
|
|
|
|
|
|
|
/* Get required info from frame */
|
|
|
|
bid = frame->dl_bid;
|
|
|
|
chan = frame->dl_chan;
|
|
|
|
handler = trx_lchan_desc[chan].rx_fn;
|
|
|
|
|
|
|
|
/* Omit bursts which have no handler, like IDLE bursts */
|
|
|
|
if (!handler)
|
|
|
|
goto next_frame;
|
|
|
|
|
|
|
|
/* Find required channel state */
|
|
|
|
lchan = sched_trx_find_lchan(ts, chan);
|
2017-07-28 09:53:59 +00:00
|
|
|
if (lchan == NULL)
|
2017-07-04 14:12:25 +00:00
|
|
|
goto next_frame;
|
|
|
|
|
|
|
|
/* Ensure that channel is active */
|
|
|
|
if (!lchan->active)
|
|
|
|
goto next_frame;
|
|
|
|
|
2017-12-17 22:47:28 +00:00
|
|
|
/* Reached current fn */
|
2017-07-04 14:12:25 +00:00
|
|
|
if (fn == burst_fn) {
|
2017-12-17 22:47:28 +00:00
|
|
|
/* Perform A5/X decryption if required */
|
|
|
|
if (lchan->a5.algo)
|
|
|
|
sched_trx_a5_burst_dec(lchan, fn, bits);
|
|
|
|
|
|
|
|
/* Put burst to handler */
|
2018-03-02 14:24:57 +00:00
|
|
|
handler(trx, ts, lchan, fn, bid, bits, rssi, toa256);
|
2017-07-04 14:12:25 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
next_frame:
|
|
|
|
/* Reached current fn */
|
|
|
|
if (fn == burst_fn)
|
|
|
|
break;
|
|
|
|
|
|
|
|
fn = (fn + 1) % GSM_HYPERFRAME;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Set last processed frame number */
|
|
|
|
ts->mf_last_fn = fn;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
2017-12-17 22:45:27 +00:00
|
|
|
|
|
|
|
int sched_trx_handle_tx_burst(struct trx_instance *trx,
|
|
|
|
struct trx_ts *ts, struct trx_lchan_state *lchan,
|
|
|
|
uint32_t fn, ubit_t *bits)
|
|
|
|
{
|
|
|
|
int rc;
|
|
|
|
|
2017-12-17 22:47:28 +00:00
|
|
|
/* Perform A5/X burst encryption if required */
|
|
|
|
if (lchan->a5.algo)
|
|
|
|
sched_trx_a5_burst_enc(lchan, fn, bits);
|
2017-12-17 22:45:27 +00:00
|
|
|
|
|
|
|
/* Forward burst to transceiver */
|
|
|
|
rc = trx_if_tx_burst(trx, ts->index, fn, trx->tx_power, bits);
|
|
|
|
if (rc) {
|
|
|
|
LOGP(DSCHD, LOGL_ERROR, "Could not send burst to transceiver\n");
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|